diff options
| author | Samuel Pitoiset <[email protected]> | 2019-07-09 08:44:01 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-07-09 09:54:27 +0200 |
| commit | 3f50007ad8b26a884d72df50914e5f161eb8d8a1 (patch) | |
| tree | 1074119f4c2fdac1296f2fa7a818e5bbb5302184 /src/amd | |
| parent | 611ddf794e61c8f2a2839d4c82689b6e12888b41 (diff) | |
radv: set correct number of VGPRs for GS on GFX10
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_shader.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index ec68f51901f..8aa5880a38b 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -795,7 +795,7 @@ static void radv_postprocess_config(const struct radv_physical_device *pdevice, } if (pdevice->rad_info.chip_class >= GFX10 && - (stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL)) { + (stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_TESS_EVAL || stage == MESA_SHADER_GEOMETRY)) { unsigned gs_vgpr_comp_cnt, es_vgpr_comp_cnt; /* VGPR5-8: (VertexID, UserVGPR0, UserVGPR1, UserVGPR2 / InstanceID) */ |