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authorDave Airlie <[email protected]>2016-11-10 10:32:08 +1000
committerDave Airlie <[email protected]>2016-11-11 09:35:43 +1000
commit2de85eb97ab2ef45ec23f694a566cd0ec8192885 (patch)
tree8eb85f28db96840b973c0d09ad538548ed87fc79 /src/amd
parenta6c3d0f92b754e11e74cea9d6bd5ac329c73a8ba (diff)
radv: fix texturesamples to handle single sample case
We can only read the valid samples if this is an MSAA texture, which means the type field must be 0x14 or 0x15. This fixes: dEQP-VK.glsl.texture_functions.query.texturesamples.* Cc: "13.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/common/ac_nir_to_llvm.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 35e669ad7e1..b7ccea88372 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3371,17 +3371,25 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr)
}
if (instr->op == nir_texop_texture_samples) {
- LLVMValueRef res, samples;
+ LLVMValueRef res, samples, is_msaa;
res = LLVMBuildBitCast(ctx->builder, res_ptr, ctx->v8i32, "");
samples = LLVMBuildExtractElement(ctx->builder, res,
LLVMConstInt(ctx->i32, 3, false), "");
+ is_msaa = LLVMBuildLShr(ctx->builder, samples,
+ LLVMConstInt(ctx->i32, 28, false), "");
+ is_msaa = LLVMBuildAnd(ctx->builder, is_msaa,
+ LLVMConstInt(ctx->i32, 0xe, false), "");
+ is_msaa = LLVMBuildICmp(ctx->builder, LLVMIntEQ, is_msaa,
+ LLVMConstInt(ctx->i32, 0xe, false), "");
+
samples = LLVMBuildLShr(ctx->builder, samples,
LLVMConstInt(ctx->i32, 16, false), "");
samples = LLVMBuildAnd(ctx->builder, samples,
LLVMConstInt(ctx->i32, 0xf, false), "");
samples = LLVMBuildShl(ctx->builder, ctx->i32one,
samples, "");
-
+ samples = LLVMBuildSelect(ctx->builder, is_msaa, samples,
+ ctx->i32one, "");
result = samples;
goto write_result;
}