ac/gpu_info: reorder the fields and print them nicely

2 files changed, 76 insertions, 55 deletions

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 6e1a2c0bfbb..6089d40e924 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -404,54 +404,69 @@ void ac_compute_device_uuid(struct radeon_info *info, char *uuid, size_t size)
 
 void ac_print_gpu_info(struct radeon_info *info)
 {
-	printf("pci (domain:bus:dev.func): %04x:%02x:%02x.%x\n",
+	printf("Device info:\n");
+	printf("    pci (domain:bus:dev.func): %04x:%02x:%02x.%x\n",
 	       info->pci_domain, info->pci_bus,
 	       info->pci_dev, info->pci_func);
-	printf("pci_id = 0x%x\n", info->pci_id);
-	printf("family = %i\n", info->family);
-	printf("chip_class = %i\n", info->chip_class);
-	printf("pte_fragment_size = %u\n", info->pte_fragment_size);
-	printf("gart_page_size = %u\n", info->gart_page_size);
-	printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size, 1024*1024));
-	printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size, 1024*1024));
-	printf("vram_vis_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_vis_size, 1024*1024));
-	printf("gds_size = %u kB\n", info->gds_size / 1024);
-	printf("gds_gfx_partition_size = %u kB\n", info->gds_gfx_partition_size / 1024);
-	printf("max_alloc_size = %i MB\n",
+	printf("    pci_id = 0x%x\n", info->pci_id);
+	printf("    family = %i\n", info->family);
+	printf("    chip_class = %i\n", info->chip_class);
+	printf("    num_compute_rings = %u\n", info->num_compute_rings);
+	printf("    num_sdma_rings = %i\n", info->num_sdma_rings);
+	printf("    clock_crystal_freq = %i\n", info->clock_crystal_freq);
+	printf("    tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
+
+	printf("Memory info:\n");
+	printf("    pte_fragment_size = %u\n", info->pte_fragment_size);
+	printf("    gart_page_size = %u\n", info->gart_page_size);
+	printf("    gart_size = %i MB\n", (int)DIV_ROUND_UP(info->gart_size, 1024*1024));
+	printf("    vram_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_size, 1024*1024));
+	printf("    vram_vis_size = %i MB\n", (int)DIV_ROUND_UP(info->vram_vis_size, 1024*1024));
+	printf("    gds_size = %u kB\n", info->gds_size / 1024);
+	printf("    gds_gfx_partition_size = %u kB\n", info->gds_gfx_partition_size / 1024);
+	printf("    max_alloc_size = %i MB\n",
 	       (int)DIV_ROUND_UP(info->max_alloc_size, 1024*1024));
-	printf("min_alloc_size = %u\n", info->min_alloc_size);
-	printf("address32_hi = %u\n", info->address32_hi);
-	printf("has_dedicated_vram = %u\n", info->has_dedicated_vram);
-	printf("gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);
-	printf("has_hw_decode = %u\n", info->has_hw_decode);
-       printf("ib_start_alignment = %u\n", info->ib_start_alignment);
-	printf("num_sdma_rings = %i\n", info->num_sdma_rings);
-	printf("num_compute_rings = %u\n", info->num_compute_rings);
-	printf("uvd_fw_version = %u\n", info->uvd_fw_version);
-	printf("vce_fw_version = %u\n", info->vce_fw_version);
-	printf("me_fw_version = %i\n", info->me_fw_version);
-	printf("me_fw_feature = %i\n", info->me_fw_feature);
-	printf("pfp_fw_version = %i\n", info->pfp_fw_version);
-	printf("pfp_fw_feature = %i\n", info->pfp_fw_feature);
-	printf("ce_fw_version = %i\n", info->ce_fw_version);
-	printf("ce_fw_feature = %i\n", info->ce_fw_feature);
-	printf("vce_harvest_config = %i\n", info->vce_harvest_config);
-	printf("clock_crystal_freq = %i\n", info->clock_crystal_freq);
-	printf("tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
-	printf("drm = %i.%i.%i\n", info->drm_major,
+	printf("    min_alloc_size = %u\n", info->min_alloc_size);
+	printf("    address32_hi = %u\n", info->address32_hi);
+	printf("    has_dedicated_vram = %u\n", info->has_dedicated_vram);
+
+	printf("CP info:\n");
+	printf("    gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);
+	printf("    ib_start_alignment = %u\n", info->ib_start_alignment);
+	printf("    me_fw_version = %i\n", info->me_fw_version);
+	printf("    me_fw_feature = %i\n", info->me_fw_feature);
+	printf("    pfp_fw_version = %i\n", info->pfp_fw_version);
+	printf("    pfp_fw_feature = %i\n", info->pfp_fw_feature);
+	printf("    ce_fw_version = %i\n", info->ce_fw_version);
+	printf("    ce_fw_feature = %i\n", info->ce_fw_feature);
+
+	printf("Multimedia info:\n");
+	printf("    has_hw_decode = %u\n", info->has_hw_decode);
+	printf("    uvd_enc_supported = %u\n", info->uvd_enc_supported);
+	printf("    uvd_fw_version = %u\n", info->uvd_fw_version);
+	printf("    vce_fw_version = %u\n", info->vce_fw_version);
+	printf("    vce_harvest_config = %i\n", info->vce_harvest_config);
+
+	printf("Kernel info:\n");
+	printf("    drm = %i.%i.%i\n", info->drm_major,
 	       info->drm_minor, info->drm_patchlevel);
-	printf("has_userptr = %i\n", info->has_userptr);
-	printf("has_syncobj = %u\n", info->has_syncobj);
-	printf("has_fence_to_handle = %u\n", info->has_fence_to_handle);
-
-	printf("max_shader_clock = %i\n", info->max_shader_clock);
-	printf("num_good_compute_units = %i\n", info->num_good_compute_units);
-	printf("max_se = %i\n", info->max_se);
-	printf("max_sh_per_se = %i\n", info->max_sh_per_se);
-
-	printf("num_render_backends = %i\n", info->num_render_backends);
-	printf("num_tile_pipes = %i\n", info->num_tile_pipes);
-	printf("pipe_interleave_bytes = %i\n", info->pipe_interleave_bytes);
-	printf("enabled_rb_mask = 0x%x\n", info->enabled_rb_mask);
-	printf("max_alignment = %u\n", (unsigned)info->max_alignment);
+	printf("    has_userptr = %i\n", info->has_userptr);
+	printf("    has_syncobj = %u\n", info->has_syncobj);
+	printf("    has_syncobj_wait_for_submit = %u\n", info->has_syncobj_wait_for_submit);
+	printf("    has_fence_to_handle = %u\n", info->has_fence_to_handle);
+	printf("    has_ctx_priority = %u\n", info->has_ctx_priority);
+	printf("    has_local_buffers = %u\n", info->has_local_buffers);
+
+	printf("Shader core info:\n");
+	printf("    max_shader_clock = %i\n", info->max_shader_clock);
+	printf("    num_good_compute_units = %i\n", info->num_good_compute_units);
+	printf("    max_se = %i\n", info->max_se);
+	printf("    max_sh_per_se = %i\n", info->max_sh_per_se);
+
+	printf("Render backend info:\n");
+	printf("    num_render_backends = %i\n", info->num_render_backends);
+	printf("    num_tile_pipes = %i\n", info->num_tile_pipes);
+	printf("    pipe_interleave_bytes = %i\n", info->pipe_interleave_bytes);
+	printf("    enabled_rb_mask = 0x%x\n", info->enabled_rb_mask);
+	printf("    max_alignment = %u\n", (unsigned)info->max_alignment);
 }
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 22ac015c23a..8aad678797c 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -50,6 +50,12 @@ struct radeon_info {
 	uint32_t                    pci_id;
 	enum radeon_family          family;
 	enum chip_class             chip_class;
+	uint32_t                    num_compute_rings;
+	uint32_t                    num_sdma_rings;
+	uint32_t                    clock_crystal_freq;
+	uint32_t                    tcc_cache_line_size;
+
+	/* Memory info. */
 	uint32_t                    pte_fragment_size;
 	uint32_t                    gart_page_size;
 	uint64_t                    gart_size;
@@ -62,23 +68,23 @@ struct radeon_info {
 	uint32_t                    address32_hi;
 	bool                        has_dedicated_vram;
 	bool                        r600_has_virtual_memory;
+
+	/* CP info. */
 	bool                        gfx_ib_pad_with_type2;
-	bool                        has_hw_decode;
 	unsigned                    ib_start_alignment;
-	uint32_t                    num_sdma_rings;
-	uint32_t                    num_compute_rings;
-	uint32_t                    uvd_fw_version;
-	uint32_t                    vce_fw_version;
-	bool                        uvd_enc_supported;
 	uint32_t                    me_fw_version;
 	uint32_t                    me_fw_feature;
 	uint32_t                    pfp_fw_version;
 	uint32_t                    pfp_fw_feature;
 	uint32_t                    ce_fw_version;
 	uint32_t                    ce_fw_feature;
+
+	/* Multimedia info. */
+	bool                        has_hw_decode;
+	bool                        uvd_enc_supported;
+	uint32_t                    uvd_fw_version;
+	uint32_t                    vce_fw_version;
 	uint32_t                    vce_harvest_config;
-	uint32_t                    clock_crystal_freq;
-	uint32_t                    tcc_cache_line_size;
 
 	/* Kernel info. */
 	uint32_t                    drm_major; /* version */
@@ -108,8 +114,8 @@ struct radeon_info {
 	uint32_t                    num_tile_pipes; /* pipe count from PIPE_CONFIG */
 	uint32_t                    pipe_interleave_bytes;
 	uint32_t                    enabled_rb_mask; /* GCN harvest config */
-
 	uint64_t                    max_alignment; /* from addrlib */
+
 	/* Tile modes. */
 	uint32_t                    si_tile_mode_array[32];
 	uint32_t                    cik_macrotile_mode_array[16];