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authorMarek Olšák <[email protected]>2017-10-08 00:41:04 +0200
committerMarek Olšák <[email protected]>2017-10-09 16:27:06 +0200
commit7b697c8b7865e9ca6be6bc445801928d7ae7169c (patch)
tree189454ef299d057ca4f0e9ed86a3c9c3ab5ef3f4 /src/amd
parent76997e9133eea8e5c4fcdc935cd279fcf5156ca5 (diff)
amd: move r600d_common.h into r600g
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/Makefile.sources1
-rw-r--r--src/amd/common/r600d_common.h135
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c2
-rw-r--r--src/amd/vulkan/radv_cs.h14
-rw-r--r--src/amd/vulkan/radv_formats.c29
-rw-r--r--src/amd/vulkan/radv_pipeline.c1
-rw-r--r--src/amd/vulkan/radv_query.c2
-rw-r--r--src/amd/vulkan/radv_shader.c1
-rw-r--r--src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h1
9 files changed, 23 insertions, 163 deletions
diff --git a/src/amd/Makefile.sources b/src/amd/Makefile.sources
index 4accab04cb9..bacba23d9de 100644
--- a/src/amd/Makefile.sources
+++ b/src/amd/Makefile.sources
@@ -1,7 +1,6 @@
COMMON_HEADER_FILES = \
common/gfx9d.h \
common/sid.h \
- common/r600d_common.h \
common/amd_family.h \
common/amd_kernel_code_t.h \
common/amdgpu_id.h
diff --git a/src/amd/common/r600d_common.h b/src/amd/common/r600d_common.h
deleted file mode 100644
index ed1d46076c0..00000000000
--- a/src/amd/common/r600d_common.h
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Copyright 2013 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * on the rights to use, copy, modify, merge, publish, distribute, sub
- * license, and/or sell copies of the Software, and to permit persons to whom
- * the Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
- * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Marek Olšák <[email protected]>
- */
-
-#ifndef R600D_COMMON_H
-#define R600D_COMMON_H
-
-#define R600_CONFIG_REG_OFFSET 0x08000
-#define R600_CONTEXT_REG_OFFSET 0x28000
-#define SI_SH_REG_OFFSET 0x0000B000
-#define SI_SH_REG_END 0x0000C000
-#define CIK_UCONFIG_REG_OFFSET 0x00030000
-#define CIK_UCONFIG_REG_END 0x00038000
-
-#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30)
-#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16)
-#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8)
-#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1)
-#define PKT3(op, count, predicate) (PKT_TYPE_S(3) | PKT_COUNT_S(count) | PKT3_IT_OPCODE_S(op) | PKT3_PREDICATE(predicate))
-
-#define PKT3_NOP 0x10
-#define PKT3_SET_PREDICATION 0x20
-#define PKT3_STRMOUT_BUFFER_UPDATE 0x34
-#define STRMOUT_STORE_BUFFER_FILLED_SIZE 1
-#define STRMOUT_OFFSET_SOURCE(x) (((unsigned)(x) & 0x3) << 1)
-#define STRMOUT_OFFSET_FROM_PACKET 0
-#define STRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1
-#define STRMOUT_OFFSET_FROM_MEM 2
-#define STRMOUT_OFFSET_NONE 3
-#define STRMOUT_SELECT_BUFFER(x) (((unsigned)(x) & 0x3) << 8)
-#define PKT3_WAIT_REG_MEM 0x3C
-#define WAIT_REG_MEM_EQUAL 3
-#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4)
-#define PKT3_COPY_DATA 0x40
-#define COPY_DATA_SRC_SEL(x) ((x) & 0xf)
-#define COPY_DATA_REG 0
-#define COPY_DATA_MEM 1
-#define COPY_DATA_PERF 4
-#define COPY_DATA_IMM 5
-#define COPY_DATA_TIMESTAMP 9
-#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8)
-#define COPY_DATA_MEM_ASYNC 5
-#define COPY_DATA_COUNT_SEL (1 << 16)
-#define COPY_DATA_WR_CONFIRM (1 << 20)
-#define PKT3_EVENT_WRITE 0x46
-#define PKT3_EVENT_WRITE_EOP 0x47
-#define EOP_INT_SEL(x) ((x) << 24)
-#define EOP_INT_SEL_NONE 0
-#define EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM 3
-#define EOP_DATA_SEL(x) ((x) << 29)
-#define EOP_DATA_SEL_DISCARD 0
-#define EOP_DATA_SEL_VALUE_32BIT 1
-#define EOP_DATA_SEL_VALUE_64BIT 2
-#define EOP_DATA_SEL_TIMESTAMP 3
-#define PKT3_RELEASE_MEM 0x49 /* GFX9+ */
-#define PKT3_SET_CONFIG_REG 0x68
-#define PKT3_SET_CONTEXT_REG 0x69
-#define PKT3_STRMOUT_BASE_UPDATE 0x72 /* r700 only */
-#define PKT3_SURFACE_BASE_UPDATE 0x73 /* r600 only */
-#define SURFACE_BASE_UPDATE_DEPTH (1 << 0)
-#define SURFACE_BASE_UPDATE_COLOR(x) (2 << (x))
-#define SURFACE_BASE_UPDATE_COLOR_NUM(x) (((1 << x) - 1) << 1)
-#define SURFACE_BASE_UPDATE_STRMOUT(x) (0x200 << (x))
-#define PKT3_SET_SH_REG 0x76 /* SI and later */
-#define PKT3_SET_UCONFIG_REG 0x79 /* CIK and later */
-
-#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS1 0x1 /* EG and later */
-#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS2 0x2 /* EG and later */
-#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS3 0x3 /* EG and later */
-#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10
-#define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14
-#define EVENT_TYPE_ZPASS_DONE 0x15
-#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16
-#define EVENT_TYPE_PERFCOUNTER_START 0x17
-#define EVENT_TYPE_PERFCOUNTER_STOP 0x18
-#define EVENT_TYPE_PIPELINESTAT_START 25
-#define EVENT_TYPE_PIPELINESTAT_STOP 26
-#define EVENT_TYPE_PERFCOUNTER_SAMPLE 0x1B
-#define EVENT_TYPE_SAMPLE_PIPELINESTAT 30
-#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f
-#define EVENT_TYPE_SAMPLE_STREAMOUTSTATS 0x20
-#define EVENT_TYPE_BOTTOM_OF_PIPE_TS 40
-#define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c /* supported on r700+ */
-#define EVENT_TYPE_FLUSH_AND_INV_CB_META 46 /* supported on r700+ */
-#define EVENT_TYPE(x) ((x) << 0)
-#define EVENT_INDEX(x) ((x) << 8)
- /* 0 - any non-TS event
- * 1 - ZPASS_DONE
- * 2 - SAMPLE_PIPELINESTAT
- * 3 - SAMPLE_STREAMOUTSTAT*
- * 4 - *S_PARTIAL_FLUSH
- * 5 - TS events
- */
-
-#define PREDICATION_OP_CLEAR 0x0
-#define PREDICATION_OP_ZPASS 0x1
-#define PREDICATION_OP_PRIMCOUNT 0x2
-#define PREDICATION_OP_BOOL64 0x3
-#define PRED_OP(x) ((x) << 16)
-#define PREDICATION_CONTINUE (1 << 31)
-#define PREDICATION_HINT_WAIT (0 << 12)
-#define PREDICATION_HINT_NOWAIT_DRAW (1 << 12)
-#define PREDICATION_DRAW_NOT_VISIBLE (0 << 8)
-#define PREDICATION_DRAW_VISIBLE (1 << 8)
-
-#define V_0280A0_SWAP_STD 0x00000000
-#define V_0280A0_SWAP_ALT 0x00000001
-#define V_0280A0_SWAP_STD_REV 0x00000002
-#define V_0280A0_SWAP_ALT_REV 0x00000003
-
-#define EG_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17)
-#define SI_S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 13)
-
-#endif
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index aaa2a5064ee..67e038a152d 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3605,7 +3605,7 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.predicating,
cmd_buffer->device->physical_device->rad_info.chip_class,
false,
- EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
+ V_028A90_BOTTOM_OF_PIPE_TS, 0,
1, va, 2, value);
assert(cmd_buffer->cs->cdw <= cdw_max);
diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h
index 0990270f5c6..840597686a8 100644
--- a/src/amd/vulkan/radv_cs.h
+++ b/src/amd/vulkan/radv_cs.h
@@ -28,7 +28,7 @@
#include <string.h>
#include <stdint.h>
#include <assert.h>
-#include "r600d_common.h"
+#include "sid.h"
static inline unsigned radeon_check_space(struct radeon_winsys *ws,
struct radeon_winsys_cs *cs,
@@ -41,11 +41,11 @@ static inline unsigned radeon_check_space(struct radeon_winsys *ws,
static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
{
- assert(reg < R600_CONTEXT_REG_OFFSET);
+ assert(reg < SI_CONTEXT_REG_OFFSET);
assert(cs->cdw + 2 + num <= cs->max_dw);
assert(num);
radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0));
- radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2);
+ radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2);
}
static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
@@ -56,11 +56,11 @@ static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned r
static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
{
- assert(reg >= R600_CONTEXT_REG_OFFSET);
+ assert(reg >= SI_CONTEXT_REG_OFFSET);
assert(cs->cdw + 2 + num <= cs->max_dw);
assert(num);
radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0));
- radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
+ radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
}
static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value)
@@ -74,10 +74,10 @@ static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
unsigned reg, unsigned idx,
unsigned value)
{
- assert(reg >= R600_CONTEXT_REG_OFFSET);
+ assert(reg >= SI_CONTEXT_REG_OFFSET);
assert(cs->cdw + 3 <= cs->max_dw);
radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0));
- radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
+ radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
radeon_emit(cs, value);
}
diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index 24445412813..88305abd044 100644
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_formats.c
@@ -26,7 +26,6 @@
#include "vk_format.h"
#include "sid.h"
-#include "r600d_common.h"
#include "vk_util.h"
@@ -767,7 +766,7 @@ unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap)
#define HAS_SWIZZLE(chan,swz) (desc->swizzle[chan] == VK_SWIZZLE_##swz)
if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32)
- return V_0280A0_SWAP_STD;
+ return V_028C70_SWAP_STD;
if (desc->layout != VK_FORMAT_LAYOUT_PLAIN)
return ~0U;
@@ -775,45 +774,45 @@ unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap)
switch (desc->nr_channels) {
case 1:
if (HAS_SWIZZLE(0,X))
- return V_0280A0_SWAP_STD; /* X___ */
+ return V_028C70_SWAP_STD; /* X___ */
else if (HAS_SWIZZLE(3,X))
- return V_0280A0_SWAP_ALT_REV; /* ___X */
+ return V_028C70_SWAP_ALT_REV; /* ___X */
break;
case 2:
if ((HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,Y)) ||
(HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,NONE)) ||
(HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,Y)))
- return V_0280A0_SWAP_STD; /* XY__ */
+ return V_028C70_SWAP_STD; /* XY__ */
else if ((HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,X)) ||
(HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,NONE)) ||
(HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,X)))
/* YX__ */
- return (do_endian_swap ? V_0280A0_SWAP_STD : V_0280A0_SWAP_STD_REV);
+ return (do_endian_swap ? V_028C70_SWAP_STD : V_028C70_SWAP_STD_REV);
else if (HAS_SWIZZLE(0,X) && HAS_SWIZZLE(3,Y))
- return V_0280A0_SWAP_ALT; /* X__Y */
+ return V_028C70_SWAP_ALT; /* X__Y */
else if (HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(3,X))
- return V_0280A0_SWAP_ALT_REV; /* Y__X */
+ return V_028C70_SWAP_ALT_REV; /* Y__X */
break;
case 3:
if (HAS_SWIZZLE(0,X))
- return (do_endian_swap ? V_0280A0_SWAP_STD_REV : V_0280A0_SWAP_STD);
+ return (do_endian_swap ? V_028C70_SWAP_STD_REV : V_028C70_SWAP_STD);
else if (HAS_SWIZZLE(0,Z))
- return V_0280A0_SWAP_STD_REV; /* ZYX */
+ return V_028C70_SWAP_STD_REV; /* ZYX */
break;
case 4:
/* check the middle channels, the 1st and 4th channel can be NONE */
if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,Z)) {
- return V_0280A0_SWAP_STD; /* XYZW */
+ return V_028C70_SWAP_STD; /* XYZW */
} else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,Y)) {
- return V_0280A0_SWAP_STD_REV; /* WZYX */
+ return V_028C70_SWAP_STD_REV; /* WZYX */
} else if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,X)) {
- return V_0280A0_SWAP_ALT; /* ZYXW */
+ return V_028C70_SWAP_ALT; /* ZYXW */
} else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,W)) {
/* YZWX */
if (desc->is_array)
- return V_0280A0_SWAP_ALT_REV;
+ return V_028C70_SWAP_ALT_REV;
else
- return (do_endian_swap ? V_0280A0_SWAP_ALT : V_0280A0_SWAP_ALT_REV);
+ return (do_endian_swap ? V_028C70_SWAP_ALT : V_028C70_SWAP_ALT_REV);
}
break;
}
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 37512e82dd9..0d22bbe4bc4 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -40,7 +40,6 @@
#include "sid.h"
#include "gfx9d.h"
-#include "r600d_common.h"
#include "ac_binary.h"
#include "ac_llvm_util.h"
#include "ac_nir_to_llvm.h"
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index b2ef8055f48..06045d6b41b 100644
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -1153,7 +1153,7 @@ void radv_CmdEndQuery(
false,
cmd_buffer->device->physical_device->rad_info.chip_class,
false,
- EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
+ V_028A90_BOTTOM_OF_PIPE_TS, 0,
1, avail_va, 0, 1);
break;
default:
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 285f42e9377..e0944a478e1 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -39,7 +39,6 @@
#include "sid.h"
#include "gfx9d.h"
-#include "r600d_common.h"
#include "ac_binary.h"
#include "ac_llvm_util.h"
#include "ac_nir_to_llvm.h"
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h
index 42d89eee54d..135d4faf943 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h
@@ -32,7 +32,6 @@
#include <string.h>
#include <stdint.h>
#include <assert.h>
-#include "r600d_common.h"
#include <amdgpu.h>
#include "radv_radeon_winsys.h"