diff options
| author | Marek Olšák <[email protected]> | 2017-09-07 00:13:37 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-09-07 17:59:37 +0200 |
| commit | 4bd2bdbb3c1df08c185b7461474ce9b323fc1b7d (patch) | |
| tree | b5066b738a74df87e8c25c30080523b62ed4c975 /src/amd | |
| parent | c4741bbb6fb98f78551f9e42ae570dcc924e0031 (diff) | |
ac/surface: add radeon_surf::has_stencil for convenience
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_surface.c | 2 | ||||
| -rw-r--r-- | src/amd/common/ac_surface.h | 1 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 6 |
3 files changed, 6 insertions, 3 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 4edefc7c40a..c6ff57362f7 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -655,6 +655,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, } } + surf->has_stencil = !!(surf->flags & RADEON_SURF_SBUFFER); surf->num_dcc_levels = 0; surf->surf_size = 0; surf->dcc_size = 0; @@ -1077,6 +1078,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib, } surf->u.gfx9.resource_type = AddrSurfInfoIn.resourceType; + surf->has_stencil = !!(surf->flags & RADEON_SURF_SBUFFER); surf->num_dcc_levels = 0; surf->surf_size = 0; diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 3b993860773..96138b968ab 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -160,6 +160,7 @@ struct radeon_surf { */ unsigned num_dcc_levels:4; unsigned is_linear:1; + unsigned has_stencil:1; /* Displayable, thin, depth, rotated. AKA D,S,Z,R swizzle modes. */ unsigned micro_tile_mode:3; uint32_t flags; diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 7c218b14783..b64a02380d6 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -3141,7 +3141,7 @@ radv_initialise_ds_surface(struct radv_device *device, } format = radv_translate_dbformat(iview->image->vk_format); - stencil_format = iview->image->surface.flags & RADEON_SURF_SBUFFER ? + stencil_format = iview->image->surface.has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID; uint32_t max_slice = radv_surface_layer_count(iview); @@ -3176,7 +3176,7 @@ radv_initialise_ds_surface(struct radv_device *device, if (iview->image->surface.htile_size && !level) { ds->db_z_info |= S_028038_TILE_SURFACE_ENABLE(1); - if (!(iview->image->surface.flags & RADEON_SURF_SBUFFER)) + if (!iview->image->surface.has_stencil) /* Use all of the htile_buffer for depth if there's no stencil. */ ds->db_stencil_info |= S_02803C_TILE_STENCIL_DISABLE(1); va = device->ws->buffer_get_va(iview->bo) + iview->image->offset + @@ -3239,7 +3239,7 @@ radv_initialise_ds_surface(struct radv_device *device, if (iview->image->surface.htile_size && !level) { ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1); - if (!(iview->image->surface.flags & RADEON_SURF_SBUFFER)) + if (!iview->image->surface.has_stencil) /* Use all of the htile_buffer for depth if there's no stencil. */ ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1); |