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authorDave Airlie <[email protected]>2017-08-15 15:17:38 +1000
committerDave Airlie <[email protected]>2017-08-16 05:52:50 +1000
commit5247b311e9b348fedd74980a34c4b6542d85b07b (patch)
tree0587841fd081cdfef9b930f3c6fb50615273cb6b /src/amd
parentd6539608a440f0102f88b375d20143f5f2d0c798 (diff)
radv/gfx9: fix set predication packet.
The predication packet changed format on GFX9, update the driver. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 88616edfa27..913ec0e7d2a 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -1133,15 +1133,18 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer)
void
si_emit_set_predication_state(struct radv_cmd_buffer *cmd_buffer, uint64_t va)
{
- uint32_t val = 0;
-
- if (va)
- val = (((va >> 32) & 0xff) |
- PRED_OP(PREDICATION_OP_BOOL64)|
- PREDICATION_DRAW_VISIBLE);
- radeon_emit(cmd_buffer->cs, PKT3(PKT3_SET_PREDICATION, 1, 0));
- radeon_emit(cmd_buffer->cs, va);
- radeon_emit(cmd_buffer->cs, val);
+ uint32_t op = PRED_OP(PREDICATION_OP_BOOL64) | PREDICATION_DRAW_VISIBLE;
+
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+ radeon_emit(cmd_buffer->cs, PKT3(PKT3_SET_PREDICATION, 2, 0));
+ radeon_emit(cmd_buffer->cs, op);
+ radeon_emit(cmd_buffer->cs, va);
+ radeon_emit(cmd_buffer->cs, va >> 32);
+ } else {
+ radeon_emit(cmd_buffer->cs, PKT3(PKT3_SET_PREDICATION, 1, 0));
+ radeon_emit(cmd_buffer->cs, va);
+ radeon_emit(cmd_buffer->cs, op | ((va >> 32) & 0xFF));
+ }
}
/* Set this if you want the 3D engine to wait until CP DMA is done.