diff options
| author | Samuel Pitoiset <[email protected]> | 2019-08-27 09:01:02 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-09-06 08:11:43 +0200 |
| commit | fa13b2f00214cbbf8d5cac05f5ffe7410f8f85a3 (patch) | |
| tree | 6434d90ec40a67bfafbc681b245763181c1a6820 /src/amd | |
| parent | c0c55bd84f744f9d4d498403f1eea93fafd6cb4b (diff) | |
radv/gfx10: always set ballot_mask_bits to 64
The codegen handles it and it adds the correct casts. This fixes
a bunch of LLVM validation errors when enabling Wave32 for compute.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_nir_to_llvm.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 047a77d6c96..27567317c8c 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -4185,8 +4185,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm, AC_FLOAT_MODE_DEFAULT; ac_llvm_context_init(&ctx.ac, ac_llvm, options->chip_class, - options->family, float_mode, options->wave_size, - options->wave_size); + options->family, float_mode, options->wave_size, 64); ctx.context = ctx.ac.context; radv_nir_shader_info_init(&shader_info->info); |