diff options
| author | Marek Olšák <[email protected]> | 2017-11-23 22:29:26 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-11-29 18:21:30 +0100 |
| commit | e3c0a5b6e807b9c8ee7273fbbc06f4991b719b01 (patch) | |
| tree | c71e26de1df828ec238b2c8358d55b52334cfbcc /src/amd | |
| parent | 6863651bbdd7dcfad60bae78d1e17898f49ca08b (diff) | |
ac/surface: enable DCC computation for MSAA
Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_surface.c | 6 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 3 |
2 files changed, 4 insertions, 5 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 4db48cf33b4..8347c45508f 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -586,7 +586,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, info->chip_class >= VI && !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) && !(surf->flags & RADEON_SURF_DISABLE_DCC) && - !compressed && AddrDccIn.numSamples <= 1 && + !compressed && ((config->info.array_size == 1 && config->info.depth == 1) || config->info.levels == 1); @@ -927,9 +927,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib, if (!(surf->flags & RADEON_SURF_DISABLE_DCC) && !(surf->flags & RADEON_SURF_SCANOUT) && !compressed && - in->swizzleMode != ADDR_SW_LINEAR && - /* TODO: We could support DCC with MSAA. */ - in->numSamples == 1) { + in->swizzleMode != ADDR_SW_LINEAR) { ADDR2_COMPUTE_DCCINFO_INPUT din = {0}; ADDR2_COMPUTE_DCCINFO_OUTPUT dout = {0}; ADDR2_META_MIP_INFO meta_mip_info[RADEON_SURF_MAX_LEVELS] = {}; diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index c241e369b91..b145e81f826 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -155,7 +155,8 @@ radv_init_surface(struct radv_device *device, (pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) || pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 || device->physical_device->rad_info.chip_class < VI || - create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC)) + create_info->scanout || (device->instance->debug_flags & RADV_DEBUG_NO_DCC) || + pCreateInfo->samples >= 2) surface->flags |= RADEON_SURF_DISABLE_DCC; if (create_info->scanout) surface->flags |= RADEON_SURF_SCANOUT; |