diff options
| author | Marek Olšák <[email protected]> | 2019-08-28 17:38:50 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2019-09-09 23:43:03 -0400 |
| commit | d95afd8b9e7f9b3880813203292257bf0ed7babf (patch) | |
| tree | 2681e0c37b64d770c2d17619485c788d36f34dc9 /src/amd | |
| parent | 42ea0b7b52d78fc923e50a0825859fe079fd8c35 (diff) | |
radeonsi/gfx10: fix wave occupancy computations
Cc: 19.2 <[email protected]>
Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 22 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 2 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_shader.c | 7 |
3 files changed, 24 insertions, 7 deletions
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index c850da22d4e..9986d58202a 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -187,7 +187,7 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info, unsigned max_waves_per_sh, unsigned threadgroups_per_cu); -static inline unsigned ac_get_max_simd_waves(enum radeon_family family) +static inline unsigned ac_get_max_wave64_per_simd(enum radeon_family family) { switch (family) { @@ -202,10 +202,26 @@ static inline unsigned ac_get_max_simd_waves(enum radeon_family family) } } +static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class, + unsigned wave_size) +{ + /* The number is per SIMD. */ + if (chip_class >= GFX10) + return wave_size == 32 ? 1024 : 512; + else + return 256; +} + static inline uint32_t -ac_get_num_physical_sgprs(enum chip_class chip_class) +ac_get_num_physical_sgprs(const struct radeon_info *info) { - return chip_class >= GFX8 ? 800 : 512; + /* The number is per SIMD. There is enough SGPRs for the maximum number + * of Wave32, which is double the number for Wave64. + */ + if (info->chip_class >= GFX10) + return 128 * ac_get_max_wave64_per_simd(info->family) * 2; + + return info->chip_class >= GFX8 ? 800 : 512; } #ifdef __cplusplus diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index d0de4715947..beeec37e54a 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1274,7 +1274,7 @@ void radv_GetPhysicalDeviceProperties2( /* SGPR. */ properties->sgprsPerSimd = - ac_get_num_physical_sgprs(pdevice->rad_info.chip_class); + ac_get_num_physical_sgprs(&pdevice->rad_info); properties->minSgprAllocation = pdevice->rad_info.chip_class >= GFX8 ? 16 : 8; properties->maxSgprAllocation = diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index c99e2615fca..082bdde04ab 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1249,7 +1249,7 @@ radv_get_max_waves(struct radv_device *device, unsigned max_simd_waves; unsigned lds_per_wave = 0; - max_simd_waves = ac_get_max_simd_waves(device->physical_device->rad_info.family); + max_simd_waves = ac_get_max_wave64_per_simd(device->physical_device->rad_info.family); if (stage == MESA_SHADER_FRAGMENT) { lds_per_wave = conf->lds_size * lds_increment + @@ -1265,7 +1265,8 @@ radv_get_max_waves(struct radv_device *device, if (conf->num_sgprs) max_simd_waves = MIN2(max_simd_waves, - ac_get_num_physical_sgprs(chip_class) / conf->num_sgprs); + ac_get_num_physical_sgprs(&device->physical_device->rad_info) / + conf->num_sgprs); if (conf->num_vgprs) max_simd_waves = @@ -1362,7 +1363,7 @@ radv_GetShaderInfoAMD(VkDevice _device, VkShaderStatisticsInfoAMD statistics = {}; statistics.shaderStageMask = shaderStage; statistics.numPhysicalVgprs = RADV_NUM_PHYSICAL_VGPRS; - statistics.numPhysicalSgprs = ac_get_num_physical_sgprs(device->physical_device->rad_info.chip_class); + statistics.numPhysicalSgprs = ac_get_num_physical_sgprs(&device->physical_device->rad_info); statistics.numAvailableSgprs = statistics.numPhysicalSgprs; if (stage == MESA_SHADER_COMPUTE) { |