diff options
| author | Timothy Arceri <[email protected]> | 2018-01-10 17:01:10 +1100 |
|---|---|---|
| committer | Timothy Arceri <[email protected]> | 2018-01-11 14:28:37 +1100 |
| commit | c797cd605ac9cb42795a40b1967b6dd10184b763 (patch) | |
| tree | 72d6d0898ad730d124b0cf6e1f76bf883e719e47 /src/amd | |
| parent | 67e09c8b451e1db8bd901279160b982b0df0fa41 (diff) | |
ac: add load_patch_vertices_in() to the abi
Fixes the follow test for radeonsi nir:
tests/spec/arb_tessellation_shader/execution/quads.shader_test
Also stops 8 other tests from crashing, they now just fail e.g.
tcs-output-array-float-index-rd-after-barrier.shader_test
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 11 | ||||
| -rw-r--r-- | src/amd/common/ac_shader_abi.h | 2 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 8301b16057d..7153c9708d4 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4166,6 +4166,13 @@ load_tess_coord(struct ac_shader_abi *abi, LLVMTypeRef type, return LLVMBuildBitCast(ctx->builder, result, type, ""); } +static LLVMValueRef +load_patch_vertices_in(struct ac_shader_abi *abi) +{ + struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi); + return LLVMConstInt(ctx->ac.i32, ctx->options->key.tcs.input_vertices, false); +} + static void visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *instr) { @@ -4366,7 +4373,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx, result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER); break; case nir_intrinsic_load_patch_vertices_in: - result = LLVMConstInt(ctx->ac.i32, ctx->nctx->options->key.tcs.input_vertices, false); + result = ctx->abi->load_patch_vertices_in(ctx->abi); break; default: fprintf(stderr, "Unknown intrinsic: "); @@ -6698,11 +6705,13 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm, ctx.tcs_outputs_read = shaders[i]->info.outputs_read; ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read; ctx.abi.load_tess_inputs = load_tcs_input; + ctx.abi.load_patch_vertices_in = load_patch_vertices_in; ctx.abi.store_tcs_outputs = store_tcs_output; } else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) { ctx.tes_primitive_mode = shaders[i]->info.tess.primitive_mode; ctx.abi.load_tess_inputs = load_tes_input; ctx.abi.load_tess_coord = load_tess_coord; + ctx.abi.load_patch_vertices_in = load_patch_vertices_in; } else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) { if (shader_info->info.vs.needs_instance_id) { if (ctx.ac.chip_class == GFX9 && diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h index e3a47089a52..06e61207ec2 100644 --- a/src/amd/common/ac_shader_abi.h +++ b/src/amd/common/ac_shader_abi.h @@ -103,6 +103,8 @@ struct ac_shader_abi { LLVMTypeRef type, unsigned num_components); + LLVMValueRef (*load_patch_vertices_in)(struct ac_shader_abi *abi); + LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi, unsigned varying_id); |