diff options
| author | Samuel Pitoiset <[email protected]> | 2017-10-05 14:55:24 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-10-12 09:17:40 +0200 |
| commit | 65dcff7a26730e2e1112f7f326b941e3a3549870 (patch) | |
| tree | 4c16305c6f1e400e2a60de7bb6edfe9695ca6181 /src/amd | |
| parent | c74ed3966e221b13bae83067f5b84f720cbc3021 (diff) | |
radv: add has_clear_state and enable it on CIK+ only
This will allow us to emit the CLEAR_STATE packet instead
of a bunch of useless packets when doing CS initialization.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/radv_device.c | 5 | ||||
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 23f5e70321d..b2aef2a8130 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -401,6 +401,11 @@ radv_physical_device_init(struct radv_physical_device *device, device->rbplus_allowed = device->rad_info.family == CHIP_STONEY; } + /* The mere presense of CLEAR_STATE in the IB causes random GPU hangs + * on SI. + */ + device->has_clear_state = device->rad_info.chip_class >= CIK; + return VK_SUCCESS; fail: diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index e673527811f..e58fb2175e2 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -277,7 +277,7 @@ struct radv_physical_device { bool has_rbplus; /* if RB+ register exist */ bool rbplus_allowed; /* if RB+ is allowed */ - + bool has_clear_state; /* This is the drivers on-disk cache used as a fallback as opposed to * the pipeline cache defined by apps. |