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authorMarek Olšák <[email protected]>2020-05-02 16:19:00 -0400
committerMarge Bot <[email protected]>2020-05-05 16:27:29 +0000
commit345b8aed5cd85eab71b7c80bbf00d8ccc5659bb3 (patch)
treefeaaa9bd572c8a28252ce81522cf6b01a4bc147c /src/amd
parent266fec1307b26a544007423582afd8618791893c (diff)
ac/surface: unset RADEON_SURF_TC_COMPATIBLE_HTILE if HTILE hasn't been computed
Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4866>
Diffstat (limited to 'src/amd')
-rw-r--r--src/amd/common/ac_surface.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 64bfa419839..b3c4c99486d 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -946,6 +946,9 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
surf->htile_size = (total_pixels / htile_block_size) *
htile_element_size;
surf->htile_size = align(surf->htile_size, surf->htile_alignment);
+ } else if (!surf->htile_size) {
+ /* Unset this if HTILE is not present. */
+ surf->flags &= ~RADEON_SURF_TC_COMPATIBLE_HTILE;
}
surf->is_linear = surf->u.legacy.level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED;
@@ -1775,6 +1778,11 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
assert(surf->num_dcc_levels);
}
+ if (!surf->htile_size) {
+ /* Unset this if HTILE is not present. */
+ surf->flags &= ~RADEON_SURF_TC_COMPATIBLE_HTILE;
+ }
+
switch (surf->u.gfx9.surf.swizzle_mode) {
/* S = standard. */
case ADDR_SW_256B_S: