diff options
author | Samuel Pitoiset <[email protected]> | 2017-10-12 22:55:32 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2017-10-14 12:25:48 +0200 |
commit | 0c1aecf177bbabff16aaef301483f689e8b850bb (patch) | |
tree | 79e2daf7f53c5eb5713363b612376f5455c91c56 /src/amd | |
parent | a4c08c8cd5257fd628ab829bec0a119076c8f641 (diff) |
radv: do not allocate CMASK for non-MSSA images with 128 bit formats
This saves some useless CMASK initializations/eliminations in
the Vulkan SSAO demo.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd')
-rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 2 | ||||
-rw-r--r-- | src/amd/vulkan/radv_image.c | 8 | ||||
-rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 5 |
3 files changed, 9 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 39dfffc3762..397f0db26c0 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3530,7 +3530,7 @@ static void radv_handle_image_transition(struct radv_cmd_buffer *cmd_buffer, dst_queue_mask, range, pending_clears); - if (image->cmask.size) + if (image->cmask.size || image->fmask.size) radv_handle_cmask_image_transition(cmd_buffer, image, src_layout, dst_layout, src_queue_mask, dst_queue_mask, range); diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 7c3e55b1b85..0564454c776 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -819,6 +819,14 @@ radv_image_can_enable_dcc(struct radv_image *image) static inline bool radv_image_can_enable_cmask(struct radv_image *image) { + if (image->surface.bpe > 8 && image->info.samples == 1) { + /* Do not enable CMASK for non-MSAA images (fast color clear) + * because 128 bit formats are not supported, but FMASK might + * still be used. + */ + return false; + } + return radv_image_can_enable_dcc_or_cmask(image) && image->info.levels == 1 && image->info.depth == 1 && diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 476a5913ae4..dd0c1a01d32 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -1027,11 +1027,6 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer, radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image, !can_avoid_fast_clear_elim); } else { - - if (iview->image->surface.bpe > 8) { - /* 128 bit formats not supported */ - return false; - } radv_fill_buffer(cmd_buffer, iview->image->bo, iview->image->offset + iview->image->cmask.offset, iview->image->cmask.size, 0); |