diff options
| author | Dave Airlie <[email protected]> | 2017-06-07 09:34:28 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-06-07 10:25:20 +1000 |
| commit | 86eff151b1252fca5942390bace106b82caa9725 (patch) | |
| tree | 61d42ddb898c2e43717116b2e2b6e38114c3cfca /src/amd | |
| parent | 00fe30f376c8db397284b4d16354314e2fc88505 (diff) | |
radv: move chip_class extraction down further.
This seems to matter here in a profile, without this we spend a lot
more time exiting this function with no flush bits.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index a251a1aa7f5..33414c1cbcd 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -1079,7 +1079,7 @@ void si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) { bool is_compute = cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE; - enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; + if (is_compute) cmd_buffer->state.flush_bits &= ~(RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | @@ -1092,6 +1092,7 @@ si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer) if (!cmd_buffer->state.flush_bits) return; + enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; radeon_check_space(cmd_buffer->device->ws, cmd_buffer->cs, 128); uint32_t *ptr = NULL; |