diff options
| author | Samuel Pitoiset <[email protected]> | 2020-07-08 13:12:37 +0200 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-07-08 12:41:10 +0000 |
| commit | 84ed2793ebdd2e5d60edc62abdef2881e703055c (patch) | |
| tree | 65e3248dce460f84fc8352cfe40d02b6a4eef30f /src/amd/vulkan | |
| parent | fcac0b4fc9d5e569548d686a1481dfdd3fd01b2c (diff) | |
radv: set depth/stencil enable values correctly for the meta clear path
They are booleans.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5803>
Diffstat (limited to 'src/amd/vulkan')
| -rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index fa3832e70ea..4d4dd109165 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -664,11 +664,11 @@ create_depthstencil_pipeline(struct radv_device *device, const VkPipelineDepthStencilStateCreateInfo ds_state = { .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO, - .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), + .depthTestEnable = !!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT), .depthCompareOp = VK_COMPARE_OP_ALWAYS, - .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT), + .depthWriteEnable = !!(aspects & VK_IMAGE_ASPECT_DEPTH_BIT), .depthBoundsTestEnable = false, - .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT), + .stencilTestEnable = !!(aspects & VK_IMAGE_ASPECT_STENCIL_BIT), .front = { .passOp = VK_STENCIL_OP_REPLACE, .compareOp = VK_COMPARE_OP_ALWAYS, |