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authorSamuel Pitoiset <[email protected]>2018-04-17 16:05:18 +0200
committerSamuel Pitoiset <[email protected]>2018-04-19 09:10:55 +0200
commit2f63b3dd09cb516b83537504adf36a0227e3f874 (patch)
tree1e346f0526d563c1991a27beac18e9332329d58b /src/amd/vulkan
parentdc3d39771ff561fe3e71aa0d08623e190ff496f9 (diff)
radv: enable DCC for MSAA 2x textures on VI under an option
This can be enabled with RADV_PERFTEST=dccmsaa. DCC for MSAA textures is actually not as easy to implement. It looks like there is some corner cases. I will improve support incrementally. Vega support, as well as Polaris improvements, will be added later. No CTS changes on Polaris using RADV_DEBUG=zerovram and RADV_PERFTEST=dccmsaa. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r--src/amd/vulkan/radv_debug.h1
-rw-r--r--src/amd/vulkan/radv_device.c4
-rw-r--r--src/amd/vulkan/radv_image.c6
-rw-r--r--src/amd/vulkan/radv_private.h3
4 files changed, 13 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_debug.h b/src/amd/vulkan/radv_debug.h
index f35991fa4e5..79c624aec1d 100644
--- a/src/amd/vulkan/radv_debug.h
+++ b/src/amd/vulkan/radv_debug.h
@@ -51,6 +51,7 @@ enum {
RADV_PERFTEST_LOCAL_BOS = 0x4,
RADV_PERFTEST_BINNING = 0x8,
RADV_PERFTEST_OUT_OF_ORDER = 0x10,
+ RADV_PERFTEST_DCC_MSAA = 0x20,
};
bool
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index fd11cedcbfe..14ecbd02001 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -314,6 +314,9 @@ radv_physical_device_init(struct radv_physical_device *device,
device->out_of_order_rast_allowed = device->has_out_of_order_rast &&
(device->instance->perftest_flags & RADV_PERFTEST_OUT_OF_ORDER);
+ device->dcc_msaa_allowed = device->rad_info.chip_class == VI &&
+ (device->instance->perftest_flags & RADV_PERFTEST_DCC_MSAA);
+
radv_physical_device_init_mem_types(device);
radv_fill_device_extension_table(device, &device->supported_extensions);
@@ -399,6 +402,7 @@ static const struct debug_control radv_perftest_options[] = {
{"localbos", RADV_PERFTEST_LOCAL_BOS},
{"binning", RADV_PERFTEST_BINNING},
{"outoforderrast", RADV_PERFTEST_OUT_OF_ORDER},
+ {"dccmsaa", RADV_PERFTEST_DCC_MSAA},
{NULL, 0}
};
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index ba8f14d91bd..348f4c7b34c 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -133,8 +133,12 @@ radv_use_dcc_for_image(struct radv_device *device,
if (create_info->scanout)
return false;
+ /* FIXME: DCC for MSAA with 4x and 8x samples doesn't work yet. */
+ if (pCreateInfo->samples > 2)
+ return false;
+
/* TODO: Enable DCC for MSAA textures. */
- if (pCreateInfo->samples >= 2)
+ if (!device->physical_device->dcc_msaa_allowed)
return false;
/* Determine if the formats are DCC compatible. */
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index af95f4b649b..4a860c595fb 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -295,6 +295,9 @@ struct radv_physical_device {
bool has_out_of_order_rast;
bool out_of_order_rast_allowed;
+ /* Whether DCC should be enabled for MSAA textures. */
+ bool dcc_msaa_allowed;
+
/* This is the drivers on-disk cache used as a fallback as opposed to
* the pipeline cache defined by apps.
*/