radv: perform proper layout transitions before resolving

Use an explicit pipeline barrier for doing layout transitions
instead of duplicating some code.

Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-By: Bas Nieuwenhuizen <[email protected]>

1 files changed, 19 insertions, 19 deletions

diff --git a/src/amd/vulkan/radv_meta_resolve.c b/src/amd/vulkan/radv_meta_resolve.c
index 2b97c42fc69..817182e17d9 100644
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -743,24 +743,24 @@ radv_decompress_resolve_src(struct radv_cmd_buffer *cmd_buffer,
 		const uint32_t src_base_layer =
 			radv_meta_get_iview_layer(src_image, &region->srcSubresource,
 						  &region->srcOffset);
-		VkImageSubresourceRange range;
-		range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
-		range.baseMipLevel = region->srcSubresource.mipLevel;
-		range.levelCount = 1;
-		range.baseArrayLayer = src_base_layer;
-		range.layerCount = region->srcSubresource.layerCount;
-
-		uint32_t queue_mask =
-			radv_image_queue_family_mask(src_image,
-						     cmd_buffer->queue_family_index,
-						     cmd_buffer->queue_family_index);
-
-		if (radv_layout_dcc_compressed(src_image, src_image_layout,
-					       queue_mask)) {
-			radv_decompress_dcc(cmd_buffer, src_image, &range);
-		} else {
-			radv_fast_clear_flush_image_inplace(cmd_buffer,
-							    src_image, &range);
-		}
+
+		VkImageMemoryBarrier barrier = {};
+		barrier.srcAccessMask = VK_ACCESS_TRANSFER_WRITE_BIT;
+		barrier.dstAccessMask = VK_ACCESS_TRANSFER_READ_BIT;
+		barrier.oldLayout = src_image_layout;
+		barrier.newLayout = VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL;
+		barrier.image = radv_image_to_handle(src_image);
+		barrier.subresourceRange = (VkImageSubresourceRange) {
+			.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
+			.baseMipLevel = region->srcSubresource.mipLevel,
+			.levelCount = 1,
+			.baseArrayLayer = src_base_layer,
+			.layerCount = region->srcSubresource.layerCount,
+		};
+
+		radv_CmdPipelineBarrier(radv_cmd_buffer_to_handle(cmd_buffer),
+					VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
+					VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT,
+					false, 0, NULL, 0, NULL, 1, &barrier);
 	}
 }