diff options
author | Dave Airlie <[email protected]> | 2017-04-19 13:27:27 +1000 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2017-05-08 08:56:52 +1000 |
commit | 387fdf84c5c21d859e9ac18a9af4ba7e3b0e35db (patch) | |
tree | 6c3bdee259e43ed8eea11201bd0961c964c3a985 /src/amd/vulkan | |
parent | 7c8bfb95c6969d1c24627abb48f823048d39424a (diff) |
radv/meta: port blit to using push constants
Remove use of vertex buffer.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r-- | src/amd/vulkan/radv_meta_blit.c | 165 |
1 files changed, 65 insertions, 100 deletions
diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c index 92a1f9dbb92..c04a611f4a8 100644 --- a/src/amd/vulkan/radv_meta_blit.c +++ b/src/amd/vulkan/radv_meta_blit.c @@ -44,18 +44,58 @@ build_nir_vertex_shader(void) vec4, "gl_Position"); pos_out->data.location = VARYING_SLOT_POS; - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_tex_pos"); - tex_pos_in->data.location = VERT_ATTRIB_GENERIC0; nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "v_tex_pos"); tex_pos_out->data.location = VARYING_SLOT_VAR0; tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; - nir_copy_var(&b, tex_pos_out, tex_pos_in); nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b); nir_store_var(&b, pos_out, outvec, 0xf); + + nir_intrinsic_instr *src_box = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src_box->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_base(src_box, 0); + nir_intrinsic_set_range(src_box, 16); + src_box->num_components = 4; + nir_ssa_dest_init(&src_box->instr, &src_box->dest, 4, 32, "src_box"); + nir_builder_instr_insert(&b, &src_box->instr); + + nir_intrinsic_instr *src0_z = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src0_z->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_base(src0_z, 16); + nir_intrinsic_set_range(src0_z, 4); + src0_z->num_components = 1; + nir_ssa_dest_init(&src0_z->instr, &src0_z->dest, 1, 32, "src0_z"); + nir_builder_instr_insert(&b, &src0_z->instr); + + nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_vertex_id_zero_base); + nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid"); + nir_builder_instr_insert(&b, &vertex_id->instr); + + /* vertex 0 - src0_x, src0_y, src0_z */ + /* vertex 1 - src0_x, src1_y, src0_z*/ + /* vertex 2 - src1_x, src0_y, src0_z */ + /* so channel 0 is vertex_id != 2 ? src_x : src_x + w + channel 1 is vertex id != 1 ? src_y : src_y + w */ + + nir_ssa_def *c0cmp = nir_ine(&b, &vertex_id->dest.ssa, + nir_imm_int(&b, 2)); + nir_ssa_def *c1cmp = nir_ine(&b, &vertex_id->dest.ssa, + nir_imm_int(&b, 1)); + + nir_ssa_def *comp[4]; + comp[0] = nir_bcsel(&b, c0cmp, + nir_channel(&b, &src_box->dest.ssa, 0), + nir_channel(&b, &src_box->dest.ssa, 2)); + + comp[1] = nir_bcsel(&b, c1cmp, + nir_channel(&b, &src_box->dest.ssa, 1), + nir_channel(&b, &src_box->dest.ssa, 3)); + comp[2] = &src0_z->dest.ssa; + comp[3] = nir_imm_float(&b, 1.0); + nir_ssa_def *out_tex_vec = nir_vec(&b, comp, 4); + nir_store_var(&b, tex_pos_out, out_tex_vec, 0xf); return b.shader; } @@ -235,52 +275,21 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, VkFilter blit_filter) { struct radv_device *device = cmd_buffer->device; - unsigned offset = 0; - struct blit_vb_data { - float tex_coord[3]; - } vb_data[3]; assert(src_image->info.samples == dest_image->info.samples); - unsigned vb_size = 3 * sizeof(*vb_data); - vb_data[0] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_0.x / (float)src_iview->extent.width, - (float)src_offset_0.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_0.x / (float)src_iview->extent.width, - (float)src_offset_1.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, - }; - vb_data[2] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_1.x / (float)src_iview->extent.width, - (float)src_offset_0.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, - }; - radv_cmd_buffer_upload_data(cmd_buffer, vb_size, 16, vb_data, &offset); - - struct radv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = cmd_buffer->upload.upload_bo, - .offset = offset, + float vertex_push_constants[5] = { + (float)src_offset_0.x / (float)src_iview->extent.width, + (float)src_offset_0.y / (float)src_iview->extent.height, + (float)src_offset_1.x / (float)src_iview->extent.width, + (float)src_offset_1.y / (float)src_iview->extent.height, + (float)src_offset_0.z / (float)src_iview->extent.depth, }; - radv_CmdBindVertexBuffers(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, - (VkBuffer[]) { - radv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - }); + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.blit.pipeline_layout, + VK_SHADER_STAGE_VERTEX_BIT, 0, 20, + vertex_push_constants); VkSampler sampler; radv_CreateSampler(radv_device_to_handle(device), @@ -498,7 +507,7 @@ void radv_CmdBlitImage( assert(src_image->info.samples == 1); assert(dest_image->info.samples == 1); - radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer); for (unsigned r = 0; r < regionCount; r++) { const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; @@ -751,24 +760,8 @@ radv_device_init_meta_blit_color(struct radv_device *device, VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0 - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -923,24 +916,8 @@ radv_device_init_meta_blit_depth(struct radv_device *device, VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0, - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -1097,24 +1074,8 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0 - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -1273,11 +1234,15 @@ radv_device_init_meta_blit_state(struct radv_device *device) if (result != VK_SUCCESS) goto fail; + const VkPushConstantRange push_constant_range = {VK_SHADER_STAGE_VERTEX_BIT, 0, 20}; + result = radv_CreatePipelineLayout(radv_device_to_handle(device), &(VkPipelineLayoutCreateInfo) { .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, .setLayoutCount = 1, .pSetLayouts = &device->meta_state.blit.ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &push_constant_range, }, &device->meta_state.alloc, &device->meta_state.blit.pipeline_layout); if (result != VK_SUCCESS) |