diff options
| author | Samuel Pitoiset <[email protected]> | 2019-09-10 15:10:13 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-09-16 12:08:22 +0200 |
| commit | c5a00c3068fe2670a26c572249e12a1ec767733d (patch) | |
| tree | 295012881659e0569b1cc3e787702eb08379b50f /src/amd/vulkan | |
| parent | 6f5a8617b40ebeca312a5cb28a5ef4375f126072 (diff) | |
radv/winsys: add support for GS and OA domains
For NGG streamout which uses GDS.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
| -rw-r--r-- | src/amd/vulkan/radv_radeon_winsys.h | 4 | ||||
| -rw-r--r-- | src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c | 4 |
2 files changed, 7 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h index 38d95624c30..ae682e52f11 100644 --- a/src/amd/vulkan/radv_radeon_winsys.h +++ b/src/amd/vulkan/radv_radeon_winsys.h @@ -45,7 +45,9 @@ struct radeon_surf; enum radeon_bo_domain { /* bitfield */ RADEON_DOMAIN_GTT = 2, RADEON_DOMAIN_VRAM = 4, - RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT + RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT, + RADEON_DOMAIN_GDS = 8, + RADEON_DOMAIN_OA = 16, }; enum radeon_bo_flag { /* bitfield */ diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c index 0f20da1d2b0..bd5ffbe7961 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_bo.c @@ -356,6 +356,10 @@ radv_amdgpu_winsys_bo_create(struct radeon_winsys *_ws, request.preferred_heap |= AMDGPU_GEM_DOMAIN_VRAM; if (initial_domain & RADEON_DOMAIN_GTT) request.preferred_heap |= AMDGPU_GEM_DOMAIN_GTT; + if (initial_domain & RADEON_DOMAIN_GDS) + request.preferred_heap |= AMDGPU_GEM_DOMAIN_GDS; + if (initial_domain & RADEON_DOMAIN_OA) + request.preferred_heap |= AMDGPU_GEM_DOMAIN_OA; if (flags & RADEON_FLAG_CPU_ACCESS) { bo->base.vram_cpu_access = initial_domain & RADEON_DOMAIN_VRAM; |