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authorMarek Olšák <[email protected]>2019-08-12 20:37:11 -0400
committerMarek Olšák <[email protected]>2019-08-19 17:23:38 -0400
commit223b3174bd103d6a77309a4212516c837352a171 (patch)
tree69e11756a5f9ae6b7e8c5956ae96c8450e4e344c /src/amd/vulkan
parent5d37194d43a13aca19291dc8596417b98b38d3c0 (diff)
radeonsi/nir: always lower ballot masks as 64-bit, codegen handles it
This fixes KHR-GL45.shader_ballot_tests.ShaderBallotBitmasks. This solution is better, because the IR isn't dependent on wave32.
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r--src/amd/vulkan/radv_nir_to_llvm.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 7c3e840104d..c7c837d16f0 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -4320,7 +4320,8 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
AC_FLOAT_MODE_DEFAULT;
ac_llvm_context_init(&ctx.ac, ac_llvm, options->chip_class,
- options->family, float_mode, options->wave_size);
+ options->family, float_mode, options->wave_size,
+ options->wave_size);
ctx.context = ctx.ac.context;
radv_nir_shader_info_init(&shader_info->info);
@@ -4834,7 +4835,7 @@ radv_compile_gs_copy_shader(struct ac_llvm_compiler *ac_llvm,
AC_FLOAT_MODE_DEFAULT;
ac_llvm_context_init(&ctx.ac, ac_llvm, options->chip_class,
- options->family, float_mode, 64);
+ options->family, float_mode, 64, 64);
ctx.context = ctx.ac.context;
ctx.is_gs_copy_shader = true;