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authorSamuel Pitoiset <[email protected]>2017-10-30 17:12:05 +0100
committerSamuel Pitoiset <[email protected]>2017-10-31 10:16:35 +0100
commit11fdc2cd3420aa1541cc4c3c733e9a878308eb55 (patch)
tree9a9a51d40b160f40166bb0c341574733aa524ece /src/amd/vulkan
parentcf41c19d9fc6c12f5fc22d0b25b9d071f70a42ca (diff)
radv: bail out when binding the same index buffer
DOW3 appears to hit this path. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c9
-rw-r--r--src/amd/vulkan/radv_private.h5
2 files changed, 14 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 12fd70f5122..00ed7182a7d 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -2281,6 +2281,15 @@ void radv_CmdBindIndexBuffer(
RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer);
RADV_FROM_HANDLE(radv_buffer, index_buffer, buffer);
+ if (cmd_buffer->state.index_buffer == index_buffer &&
+ cmd_buffer->state.index_offset == offset &&
+ cmd_buffer->state.index_type == indexType) {
+ /* No state changes. */
+ return;
+ }
+
+ cmd_buffer->state.index_buffer = index_buffer;
+ cmd_buffer->state.index_offset = offset;
cmd_buffer->state.index_type = indexType; /* vk matches hw */
cmd_buffer->state.index_va = radv_buffer_get_va(index_buffer->bo);
cmd_buffer->state.index_va += index_buffer->offset + offset;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 381afb777f3..1b1fa93ee3c 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -815,9 +815,14 @@ struct radv_cmd_state {
struct radv_descriptor_set * descriptors[MAX_SETS];
struct radv_attachment_state * attachments;
VkRect2D render_area;
+
+ /* Index buffer */
+ struct radv_buffer *index_buffer;
+ uint64_t index_offset;
uint32_t index_type;
uint32_t max_index_count;
uint64_t index_va;
+
int32_t last_primitive_reset_en;
uint32_t last_primitive_reset_index;
enum radv_cmd_flush_bits flush_bits;