diff options
author | Bas Nieuwenhuizen <[email protected]> | 2017-03-08 21:36:55 +0100 |
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committer | Bas Nieuwenhuizen <[email protected]> | 2017-03-09 02:35:10 +0100 |
commit | 0567ab0407e4058c108443b90b7c23a40c391c3b (patch) | |
tree | e9e9bea18c70680f77dba42713dd24245af90476 /src/amd/vulkan | |
parent | 7a600bbc8186fef9475bedfe6d58a54011a8022b (diff) |
radv: Flush more caches after writes.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan')
-rw-r--r-- | src/amd/vulkan/radv_cmd_buffer.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8c812084141..a1127130a5d 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1465,13 +1465,19 @@ radv_src_access_flush(struct radv_cmd_buffer *cmd_buffer, flush_bits |= RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2; break; case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT: - flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META; break; case VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT: - flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB; + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META; break; case VK_ACCESS_TRANSFER_WRITE_BIT: - flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB; + flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_FLUSH_AND_INV_DB | + RADV_CMD_FLAG_FLUSH_AND_INV_DB_META | + RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2; break; default: break; |