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authorDave Airlie <[email protected]>2017-02-14 16:05:43 +1000
committerDave Airlie <[email protected]>2017-02-15 05:02:13 +1000
commit0f1a4220a693a02685bf227f8b9d932046f7d1d3 (patch)
tree8444d12ce87c12ad8edaca3764a6a854a2ea126b /src/amd/vulkan/winsys/amdgpu
parent06ffd299252311f57feac4474551bd5b44d3d4d4 (diff)
radv: fix cik macroModeIndex.
This just a CIK fix ported from radeonsi. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/winsys/amdgpu')
-rw-r--r--src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
index 02aad3c81d2..dc596ff0574 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_surface.c
@@ -274,6 +274,19 @@ static void radv_set_micro_tile_mode(struct radeon_surf *surf,
surf->micro_tile_mode = G_009910_MICRO_TILE_MODE(tile_mode);
}
+static unsigned cik_get_macro_tile_index(struct radeon_surf *surf)
+{
+ unsigned index, tileb;
+
+ tileb = 8 * 8 * surf->bpe;
+ tileb = MIN2(surf->tile_split, tileb);
+
+ for (index = 0; tileb > 64; index++)
+ tileb >>= 1;
+
+ assert(index < 16);
+ return index;
+}
static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws,
struct radeon_surf *surf)
@@ -435,6 +448,7 @@ static int radv_amdgpu_winsys_surface_init(struct radeon_winsys *_ws,
AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */
else
AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */
+ AddrSurfInfoOut.macroModeIndex = cik_get_macro_tile_index(surf);
}
}