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authorSamuel Pitoiset <[email protected]>2019-06-25 14:28:10 +0200
committerBas Nieuwenhuizen <[email protected]>2019-07-07 17:51:32 +0200
commitc90f46700dd2739ed9abb1246880d4829fdb3252 (patch)
treebf4178e2b1d6d57490b92df75ef586da35b6f707 /src/amd/vulkan/si_cmd_buffer.c
parentb1b60a92b17e18f55c4d176e0b8445b6f486379a (diff)
radv/gfx10: mask DCC tile swizzle by alignment
DCC alignment can be less than the alignment of the main surface. In that case, the DCC tile swizzle needs to be masked accordingly. Should have no impact on pre-gfx10. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
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