diff options
| author | Dave Airlie <[email protected]> | 2017-03-30 08:10:46 +0100 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-04-01 07:15:51 +1000 |
| commit | aeb49bc2b9e1d6f98b760a8cc3f208418b7f4349 (patch) | |
| tree | 84a3ea4f699cd6897f1753d73225378fe975b44a /src/amd/vulkan/si_cmd_buffer.c | |
| parent | 46a820b383350bfaabde990e81f2086b040e0d13 (diff) | |
radv: port polaris vgt vertex reuse workaround.
This ports the VGT_VERTEX_REUSE register settings
for Polaris GPUs from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index bbc953f7a1a..93f6b7a949d 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -414,7 +414,8 @@ si_emit_config(struct radv_physical_device *physical_device, radeon_set_context_reg(cs, R_028424_CB_DCC_CONTROL, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) | S_028424_OVERWRITE_COMBINER_WATERMARK(4)); - radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); + if (physical_device->rad_info.family < CHIP_POLARIS10) + radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); radeon_set_context_reg(cs, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); vgt_tess_distribution = S_028B50_ACCUM_ISOLINE(32) | |