diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 15:38:44 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2019-07-07 17:51:32 +0200 |
| commit | 3f68329806a025a9ceab0d47c7ecff31710b8dde (patch) | |
| tree | ff96c70f6f1867dece6f2c30dbe65baa981be1d2 /src/amd/vulkan/si_cmd_buffer.c | |
| parent | 2a83154b4aa4ae9a86134bfd66f315c91e91302f (diff) | |
radv/gfx10: emit VGT_VERTEX_REUSE_BLOCK_CNTL during gfx initialization
The value doesn't need to be updated for tess.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 91015f9f01e..91a1db4fc84 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -321,6 +321,7 @@ si_emit_graphics(struct radv_physical_device *physical_device, } if (physical_device->rad_info.chip_class >= GFX10) { + radeon_set_context_reg(cs, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 14); radeon_set_context_reg(cs, R_02835C_PA_SC_TILE_STEERING_OVERRIDE, physical_device->rad_info.pa_sc_tile_steering_override); radeon_set_context_reg(cs, R_02807C_DB_RMI_L2_CACHE_CONTROL, |