diff options
| author | Dave Airlie <[email protected]> | 2017-06-06 09:05:12 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-06-06 09:43:55 +1000 |
| commit | 5c8f8cae3e84b4aa188c3c1ddad790ccb2f542a9 (patch) | |
| tree | a97da5d779bf674a0e4c8e3fdc51e87d7161ae83 /src/amd/vulkan/si_cmd_buffer.c | |
| parent | 67655cb24fbd0d9dbacfb7c1059e21751b6c10eb (diff) | |
radv: add IA_MULTI_VGT_PARAM support for GFX9.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 397ea810084..a10034e4f20 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -716,7 +716,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, /* Needed for 028B6C_DISTRIBUTION_MODE != 0 */ if (cmd_buffer->device->has_distributed_tess) { if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) { - partial_es_wave = true; + if (chip_class <= VI) + partial_es_wave = true; if (family == CHIP_TONGA || family == CHIP_FIJI || @@ -784,7 +785,7 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, assert(wd_switch_on_eop || !ia_switch_on_eop); } /* If SWITCH_ON_EOI is set, PARTIAL_ES_WAVE must be set too. */ - if (ia_switch_on_eoi) + if (chip_class <= VI && ia_switch_on_eoi) partial_es_wave = true; if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) { @@ -806,8 +807,11 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, S_028AA8_PARTIAL_ES_WAVE_ON(partial_es_wave) | S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) | S_028AA8_WD_SWITCH_ON_EOP(chip_class >= CIK ? wd_switch_on_eop : 0) | - S_028AA8_MAX_PRIMGRP_IN_WAVE(chip_class >= VI ? - max_primgroup_in_wave : 0); + /* The following field was moved to VGT_SHADER_STAGES_EN in GFX9. */ + S_028AA8_MAX_PRIMGRP_IN_WAVE(chip_class == VI ? + max_primgroup_in_wave : 0) | + S_030960_EN_INST_OPT_BASIC(chip_class >= GFX9) | + S_030960_EN_INST_OPT_ADV(chip_class >= GFX9); } |