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authorBas Nieuwenhuizen <[email protected]>2017-02-20 09:26:00 +0100
committerBas Nieuwenhuizen <[email protected]>2017-02-21 09:19:58 +0100
commit5241fb0ffbe302db0835268c911d566fa18665b9 (patch)
tree7c1932c39090d704ebd2f3b6540a1cee065dfa67 /src/amd/vulkan/si_cmd_buffer.c
parentc121739c4772a9442bc6866abae9306773abe3de (diff)
radv: Flush in the initial preamble CS.
Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 1091c7bb221..4709ef69a02 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -689,7 +689,7 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
}
-static void
+void
si_cs_emit_cache_flush(struct radeon_winsys_cs *cs,
enum chip_class chip_class,
bool is_mec,