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authorBas Nieuwenhuizen <[email protected]>2017-04-19 22:32:16 +0200
committerBas Nieuwenhuizen <[email protected]>2017-04-19 23:47:27 +0200
commit1e1165389c1940415306fae1e5bbe3e75b649975 (patch)
tree5c4fee6a3312732c00a3259653cd8b84b2eb7617 /src/amd/vulkan/si_cmd_buffer.c
parent74d92e547c0c5118e15df71b81a46a588e6a0a01 (diff)
radv: Add shader prefetch.
Gives me approximately a 2% perf increase in bot dota2 & talos. Having descriptors (both sets and vertex buffers) prefetched didn't help so I didn't include that. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
-rw-r--r--src/amd/vulkan/si_cmd_buffer.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 711dbde0aca..41625aa132d 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -1022,6 +1022,16 @@ static void si_emit_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer,
radv_cmd_buffer_trace_emit(cmd_buffer);
}
+void si_cp_dma_prefetch(struct radv_cmd_buffer *cmd_buffer, uint64_t va,
+ unsigned size)
+{
+ uint64_t aligned_va = va & ~(CP_DMA_ALIGNMENT - 1);
+ uint64_t aligned_size = ((va + size + CP_DMA_ALIGNMENT -1) & ~(CP_DMA_ALIGNMENT - 1)) - aligned_va;
+
+ si_emit_cp_dma_copy_buffer(cmd_buffer, aligned_va, aligned_va,
+ aligned_size, CIK_CP_DMA_USE_L2);
+}
+
static void si_cp_dma_prepare(struct radv_cmd_buffer *cmd_buffer, uint64_t byte_count,
uint64_t remaining_size, unsigned *flags)
{