diff options
| author | Dave Airlie <[email protected]> | 2017-01-18 13:55:05 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-01-31 09:28:28 +1000 |
| commit | 3b507855cb1fe3ff9e1930bcf90f44e600587fa0 (patch) | |
| tree | 4f3cd180a872e92d68c7ea24d99e93a8d7b8a98e /src/amd/vulkan/si_cmd_buffer.c | |
| parent | 68c5da7e664b19f6f3cd241a07136a033fd481b7 (diff) | |
radv: fixup ia multi vgt param code to handle geom shaders.
This fixes up a few of the commented out blocks.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/si_cmd_buffer.c')
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index e2025b1dd19..1c99b2282c6 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -512,6 +512,7 @@ uint32_t si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer) { enum chip_class chip_class = cmd_buffer->device->physical_device->rad_info.chip_class; + enum radeon_family family = cmd_buffer->device->physical_device->rad_info.family; struct radeon_info *info = &cmd_buffer->device->physical_device->rad_info; unsigned prim = cmd_buffer->state.pipeline->graphics.prim; unsigned primgroup_size = 128; /* recommended without a GS */ @@ -523,7 +524,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer) bool partial_vs_wave = false; bool partial_es_wave = false; - /* TODO GS */ + if (radv_pipeline_has_gs(cmd_buffer->state.pipeline)) + primgroup_size = 64; /* recommended with a GS */ /* TODO TES */ @@ -549,17 +551,15 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer) ia_switch_on_eoi = true; /* Required by Hawaii and, for some special cases, by VI. */ -#if 0 if (ia_switch_on_eoi && - (sctx->b.family == CHIP_HAWAII || - (sctx->b.chip_class == VI && - (sctx->gs_shader.cso || max_primgroup_in_wave != 2)))) + (family == CHIP_HAWAII || + (chip_class == VI && + (radv_pipeline_has_gs(cmd_buffer->state.pipeline) || max_primgroup_in_wave != 2)))) partial_vs_wave = true; -#endif #if 0 /* Instancing bug on Bonaire. */ - if (sctx->b.family == CHIP_BONAIRE && ia_switch_on_eoi && + if (family == CHIP_BONAIRE && ia_switch_on_eoi && (info->indirect || info->instance_count > 1)) partial_vs_wave = true; #endif @@ -571,15 +571,13 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer) partial_es_wave = true; /* GS requirement. */ -#if 0 - if (SI_GS_PER_ES / primgroup_size >= sctx->screen->gs_table_depth - 3) + if (SI_GS_PER_ES / primgroup_size >= cmd_buffer->device->gs_table_depth - 3) partial_es_wave = true; -#endif /* Hw bug with single-primitive instances and SWITCH_ON_EOI * on multi-SE chips. */ #if 0 - if (sctx->b.screen->info.max_se >= 2 && ia_switch_on_eoi && + if (info->max_se >= 2 && ia_switch_on_eoi && (info->indirect || (info->instance_count > 1 && si_num_prims_for_vertices(info) <= 1))) |