diff options
author | Samuel Pitoiset <[email protected]> | 2019-09-03 10:29:19 +0200 |
---|---|---|
committer | Samuel Pitoiset <[email protected]> | 2019-09-10 09:26:45 +0200 |
commit | a9af11f1facd5d79e1284296870ca200ccf17da6 (patch) | |
tree | a91048b95c7cb90ce8df9e4c58c76dcebce2476c /src/amd/vulkan/radv_shader.c | |
parent | 8cf297c7b14a04ca587bcbc5cce9e61bcaed5a5a (diff) |
radv: fill shader info for all stages in the pipeline
This shouldn't be in NIR->LLVM because ACO also needs the shader
info. This will also help for computing some NGG values that are
necessary for declaring LDS symbols.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_shader.c')
-rw-r--r-- | src/amd/vulkan/radv_shader.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 082bdde04ab..146d85ade5a 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1039,6 +1039,7 @@ shader_variant_compile(struct radv_device *device, struct nir_shader * const *shaders, int shader_count, gl_shader_stage stage, + struct radv_shader_info *info, struct radv_nir_compiler_options *options, bool gs_copy_shader, bool keep_shader_info, @@ -1048,7 +1049,6 @@ shader_variant_compile(struct radv_device *device, enum ac_target_machine_options tm_options = 0; struct ac_llvm_compiler ac_llvm; struct radv_shader_binary *binary = NULL; - struct radv_shader_info info = {0}; bool thread_compiler; options->family = chip_family; @@ -1090,12 +1090,12 @@ shader_variant_compile(struct radv_device *device, if (gs_copy_shader) { assert(shader_count == 1); radv_compile_gs_copy_shader(&ac_llvm, *shaders, &binary, - &info, options); + info, options); } else { - radv_compile_nir_shader(&ac_llvm, &binary, &info, + radv_compile_nir_shader(&ac_llvm, &binary, info, shaders, shader_count, options); } - binary->info = info; + binary->info = *info; radv_destroy_llvm_compiler(&ac_llvm, thread_compiler); @@ -1134,6 +1134,7 @@ radv_shader_variant_compile(struct radv_device *device, int shader_count, struct radv_pipeline_layout *layout, const struct radv_shader_variant_key *key, + struct radv_shader_info *info, bool keep_shader_info, struct radv_shader_binary **binary_out) { @@ -1147,13 +1148,14 @@ radv_shader_variant_compile(struct radv_device *device, options.supports_spill = true; options.robust_buffer_access = device->robust_buffer_access; - return shader_variant_compile(device, module, shaders, shader_count, shaders[shader_count - 1]->info.stage, + return shader_variant_compile(device, module, shaders, shader_count, shaders[shader_count - 1]->info.stage, info, &options, false, keep_shader_info, binary_out); } struct radv_shader_variant * radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *shader, + struct radv_shader_info *info, struct radv_shader_binary **binary_out, bool keep_shader_info, bool multiview) @@ -1163,7 +1165,7 @@ radv_create_gs_copy_shader(struct radv_device *device, options.key.has_multiview_view_index = multiview; return shader_variant_compile(device, NULL, &shader, 1, MESA_SHADER_VERTEX, - &options, true, keep_shader_info, binary_out); + info, &options, true, keep_shader_info, binary_out); } void |