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authorSamuel Pitoiset <[email protected]>2020-03-16 18:44:18 +0100
committerMarge Bot <[email protected]>2020-03-17 12:45:01 +0000
commitc923de68dd0ab10a5a5fb3196f539707d046d897 (patch)
tree2a413542ecf67525e7dc57d405551ebf9da64e07 /src/amd/vulkan/radv_shader.c
parent672d10619980687acec329742f055f7f3796c1b8 (diff)
radv/gfx10: fix required ballot size with VK_EXT_subgroup_size_control
If compute shaders require a specific subgroup size (ie. Wave32), we have to use the correct ballot size. Fixes dEQP-VK.subgroups.ballot_other.compute.*_requiredsubgroupSize. Fixes: fb07fd4e6cb ("radv: implement VK_EXT_subgroup_size_control") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>
Diffstat (limited to 'src/amd/vulkan/radv_shader.c')
-rw-r--r--src/amd/vulkan/radv_shader.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 4132dce1aee..98c98db5665 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -293,7 +293,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
const VkSpecializationInfo *spec_info,
const VkPipelineCreateFlags flags,
const struct radv_pipeline_layout *layout,
- unsigned subgroup_size)
+ unsigned subgroup_size, unsigned ballot_bit_size)
{
nir_shader *nir;
const nir_shader_compiler_options *nir_options =
@@ -483,7 +483,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
bool gfx7minus = device->physical_device->rad_info.chip_class <= GFX7;
nir_lower_subgroups(nir, &(struct nir_lower_subgroups_options) {
.subgroup_size = subgroup_size,
- .ballot_bit_size = 64,
+ .ballot_bit_size = ballot_bit_size,
.lower_to_scalar = 1,
.lower_subgroup_masks = 1,
.lower_shuffle = 1,