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authorSamuel Pitoiset <[email protected]>2020-04-16 16:58:13 +0200
committerMarge Bot <[email protected]>2020-04-17 16:11:17 +0000
commit19aa68ae315df7654bd81a4c293aeaf5f7a7f4a6 (patch)
tree5f16e372c3f03a9673c30d2bf2581460dbf459d9 /src/amd/vulkan/radv_shader.c
parentfd6e44236c07583b3b838b2c7ed01fea27002ef9 (diff)
radv: set missing SHARED_VGPR_CNT for NGG VS and ACO
shuffle is implemented with shared VGPRs with ACO and Wave64. Fixes dEQP-VK.subgroups.shuffle.framebuffer.subgroupshuffle*_vertex with Wave64. Fixes: c24d9522dae ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4595>
Diffstat (limited to 'src/amd/vulkan/radv_shader.c')
-rw-r--r--src/amd/vulkan/radv_shader.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index b04da434660..61923b432ee 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -798,8 +798,8 @@ static void radv_postprocess_config(const struct radv_physical_device *pdevice,
}
config_out->rsrc1 |= S_00B128_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);
- config_out->rsrc2 |= S_00B12C_SHARED_VGPR_CNT(num_shared_vgpr_blocks);
}
+ config_out->rsrc2 |= S_00B12C_SHARED_VGPR_CNT(num_shared_vgpr_blocks);
break;
case MESA_SHADER_FRAGMENT:
config_out->rsrc1 |= S_00B028_MEM_ORDERED(pdevice->rad_info.chip_class >= GFX10);