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authorDave Airlie <[email protected]>2017-05-24 11:37:06 +1000
committerDave Airlie <[email protected]>2017-06-06 08:22:45 +1000
commitd1a4d229ec15653c3a3d2d7f270d74288d1aaa21 (patch)
tree181aa918746b9fbbb30b1068693d649da8b35e03 /src/amd/vulkan/radv_radeon_winsys.h
parentd987f90354822f97b36a559212a273c21b5d396f (diff)
radv: split metadata struct into legacy/gfx9 parts.
This is just ported from radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_radeon_winsys.h')
-rw-r--r--src/amd/vulkan/radv_radeon_winsys.h29
1 files changed, 19 insertions, 10 deletions
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 397f28e3c46..cdcaeca46ec 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -103,16 +103,25 @@ struct radeon_bo_metadata {
/* Tiling flags describing the texture layout for display code
* and DRI sharing.
*/
- enum radeon_bo_layout microtile;
- enum radeon_bo_layout macrotile;
- unsigned pipe_config;
- unsigned bankw;
- unsigned bankh;
- unsigned tile_split;
- unsigned mtilea;
- unsigned num_banks;
- unsigned stride;
- bool scanout;
+ union {
+ struct {
+ enum radeon_bo_layout microtile;
+ enum radeon_bo_layout macrotile;
+ unsigned pipe_config;
+ unsigned bankw;
+ unsigned bankh;
+ unsigned tile_split;
+ unsigned mtilea;
+ unsigned num_banks;
+ unsigned stride;
+ bool scanout;
+ } legacy;
+
+ struct {
+ /* surface flags */
+ unsigned swizzle_mode:5;
+ } gfx9;
+ } u;
/* Additional metadata associated with the buffer, in bytes.
* The maximum size is 64 * 4. This is opaque for the winsys & kernel.