diff options
| author | Samuel Pitoiset <[email protected]> | 2019-06-25 17:57:45 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-06-25 18:38:37 +0200 |
| commit | 8ea7ee153649ac07c8418cc0d4aa5a4e123d19d1 (patch) | |
| tree | 05b4740f8d00e8de9c3d9b0ff0c896dab358b6dd /src/amd/vulkan/radv_query.c | |
| parent | 5411f470564f6f1c2a55d037103f051cbddd5623 (diff) | |
radv: rename and re-document cache flush flags
SMEM and VMEM caches are L0 on gfx10. Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_query.c')
| -rw-r--r-- | src/amd/vulkan/radv_query.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index bec7b23af05..82741c21bf7 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -1012,8 +1012,8 @@ static void radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VK_SHADER_STAGE_COMPUTE_BIT, 0, sizeof(push_constants), &push_constants); - cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2 | - RADV_CMD_FLAG_INV_VMEM_L1; + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_L2 | + RADV_CMD_FLAG_INV_VCACHE; if (flags & VK_QUERY_RESULT_WAIT_BIT) cmd_buffer->state.flush_bits |= RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER; @@ -1639,8 +1639,8 @@ static void emit_end_query(struct radv_cmd_buffer *cmd_buffer, cmd_buffer->active_query_flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH | RADV_CMD_FLAG_CS_PARTIAL_FLUSH | - RADV_CMD_FLAG_INV_GLOBAL_L2 | - RADV_CMD_FLAG_INV_VMEM_L1; + RADV_CMD_FLAG_INV_L2 | + RADV_CMD_FLAG_INV_VCACHE; if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) { cmd_buffer->active_query_flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB | RADV_CMD_FLAG_FLUSH_AND_INV_DB; |