diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2018-01-10 02:41:30 +0100 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2018-01-10 13:26:22 +0100 |
| commit | 5db0bf99944ff2d3e83ef27d2aebe8f074d93d59 (patch) | |
| tree | 20a46ecc34931d6c674013d910c1057ee1f31aae /src/amd/vulkan/radv_private.h | |
| parent | 11b9cdd2d702e4de3b66ef63aa23f4319b4bc74b (diff) | |
radv: Implement VK_EXT_discard_rectangles.
Tested with a modified deferred demo and no regressions in a 1.0.2
mustpass run.
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_private.h')
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index b7c53d03fbd..7330dc6369a 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -81,6 +81,7 @@ typedef uint32_t xcb_window_t; #define MAX_RTS 8 #define MAX_VIEWPORTS 16 #define MAX_SCISSORS 16 +#define MAX_DISCARD_RECTANGLES 4 #define MAX_PUSH_CONSTANTS_SIZE 128 #define MAX_PUSH_DESCRIPTORS 32 #define MAX_DYNAMIC_BUFFERS 16 @@ -739,7 +740,8 @@ enum radv_dynamic_state_bits { RADV_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, RADV_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, RADV_DYNAMIC_STENCIL_REFERENCE = 1 << 8, - RADV_DYNAMIC_ALL = (1 << 9) - 1, + RADV_DYNAMIC_DISCARD_RECTANGLE = 1 << 9, + RADV_DYNAMIC_ALL = (1 << 10) - 1, }; enum radv_cmd_dirty_bits { @@ -754,11 +756,12 @@ enum radv_cmd_dirty_bits { RADV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, RADV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, RADV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, - RADV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1, - RADV_CMD_DIRTY_PIPELINE = 1 << 9, - RADV_CMD_DIRTY_INDEX_BUFFER = 1 << 10, - RADV_CMD_DIRTY_FRAMEBUFFER = 1 << 11, - RADV_CMD_DIRTY_VERTEX_BUFFER = 1 << 12, + RADV_CMD_DIRTY_DYNAMIC_DISCARD_RECTANGLE = 1 << 9, + RADV_CMD_DIRTY_DYNAMIC_ALL = (1 << 10) - 1, + RADV_CMD_DIRTY_PIPELINE = 1 << 10, + RADV_CMD_DIRTY_INDEX_BUFFER = 1 << 11, + RADV_CMD_DIRTY_FRAMEBUFFER = 1 << 12, + RADV_CMD_DIRTY_VERTEX_BUFFER = 1 << 13, }; enum radv_cmd_flush_bits { @@ -803,6 +806,11 @@ struct radv_scissor_state { VkRect2D scissors[MAX_SCISSORS]; }; +struct radv_discard_rectangle_state { + uint32_t count; + VkRect2D rectangles[MAX_DISCARD_RECTANGLES]; +}; + struct radv_dynamic_state { /** * Bitmask of (1 << VK_DYNAMIC_STATE_*). @@ -843,6 +851,8 @@ struct radv_dynamic_state { uint32_t front; uint32_t back; } stencil_reference; + + struct radv_discard_rectangle_state discard_rectangle; }; extern const struct radv_dynamic_state default_dynamic_state; @@ -1239,6 +1249,7 @@ struct radv_pipeline { uint32_t vtx_reuse_depth; struct radv_prim_vertex_count prim_vertex_count; bool can_use_guardband; + uint32_t pa_sc_cliprect_rule; } graphics; }; |