diff options
| author | Dave Airlie <[email protected]> | 2017-03-02 21:39:10 +0000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-07-17 01:44:43 +0100 |
| commit | 9ee67467c9ea592340aee10a55ba54d7266ff0a9 (patch) | |
| tree | 4588211428eb7a5f369bd0ac3629f32d34863d8a /src/amd/vulkan/radv_private.h | |
| parent | 8eed291c2c4bfaddf256dcdb10bfa95bfe2b7c58 (diff) | |
radv: predicate cmask eliminate when using DCC.
When using DCC some clear values don't require a cmask eliminate
step. This patch adds support for black and black with alpha 1,
there are other values, but I don't have access to a comprehensive list.
This works by setting the cmask eliminate predicate when doing the
fast clear, and later when doing the cmask elimination making sure
the draws are predicated.
This increases the fps on Sascha Willems deferred.
Tonga: 580fps->670fps on a Tonga PRO card.
Polaris 730->850fps
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_private.h')
| -rw-r--r-- | src/amd/vulkan/radv_private.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index e1fb5565494..891b34ef138 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -871,7 +871,7 @@ void si_cs_emit_cache_flush(struct radeon_winsys_cs *cs, bool is_mec, enum radv_cmd_flush_bits flush_bits); void si_emit_cache_flush(struct radv_cmd_buffer *cmd_buffer); -void si_emit_set_pred(struct radv_cmd_buffer *cmd_buffer, uint64_t va); +void si_emit_set_predication_state(struct radv_cmd_buffer *cmd_buffer, uint64_t va); void si_cp_dma_buffer_copy(struct radv_cmd_buffer *cmd_buffer, uint64_t src_va, uint64_t dest_va, uint64_t size); @@ -914,6 +914,9 @@ void radv_set_color_clear_regs(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, int idx, uint32_t color_values[2]); +void radv_set_dcc_need_cmask_elim_pred(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, + bool value); void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *bo, uint64_t offset, uint64_t size, uint32_t value); @@ -1219,6 +1222,7 @@ struct radv_image { struct radv_fmask_info fmask; struct radv_cmask_info cmask; uint32_t clear_value_offset; + uint32_t dcc_pred_offset; }; /* Whether the image has a htile that is known consistent with the contents of |