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authorDave Airlie <[email protected]>2017-03-30 08:02:14 +0100
committerDave Airlie <[email protected]>2017-04-01 07:15:30 +1000
commit46e52df34d3074f1fc649195dded461bcb64a231 (patch)
treede5b3d9e462715ae04722f4b90254f7ff95d2176 /src/amd/vulkan/radv_private.h
parentbbfb62df166527b20c9a2217c559119c138f3af4 (diff)
radv: add tessellation ring allocation support. (v2)
This patch adds support for the offchip rings for storing tessellation factors and attribute data. It includes the register setup for the TF ring v2: always do tess ring size calcs (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_private.h')
-rw-r--r--src/amd/vulkan/radv_private.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 3c246641af7..d6982d826aa 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -459,12 +459,15 @@ struct radv_queue {
uint32_t compute_scratch_size;
uint32_t esgs_ring_size;
uint32_t gsvs_ring_size;
+ bool has_tess_rings;
struct radeon_winsys_bo *scratch_bo;
struct radeon_winsys_bo *descriptor_bo;
struct radeon_winsys_bo *compute_scratch_bo;
struct radeon_winsys_bo *esgs_ring_bo;
struct radeon_winsys_bo *gsvs_ring_bo;
+ struct radeon_winsys_bo *tess_factor_ring_bo;
+ struct radeon_winsys_bo *tess_offchip_ring_bo;
struct radeon_winsys_cs *initial_preamble_cs;
struct radeon_winsys_cs *continue_preamble_cs;
};
@@ -744,6 +747,7 @@ struct radv_cmd_buffer {
uint32_t compute_scratch_size_needed;
uint32_t esgs_ring_size_needed;
uint32_t gsvs_ring_size_needed;
+ bool tess_rings_needed;
int ring_offsets_idx; /* just used for verification */
};