radv: move shaders related code to radv_shader.c

Reduce size of radv_pipeline.c and improve code isolation. More
code can probably moved but it's a start.

Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>

1 files changed, 1 insertions, 42 deletions

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index c75b06d6266..dd99d7faa78 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -330,9 +330,6 @@ radv_pipeline_cache_insert_shader(struct radv_pipeline_cache *cache,
 				  struct radv_shader_variant *variant,
 				  const void *code, unsigned code_size);
 
-void radv_shader_variant_destroy(struct radv_device *device,
-				 struct radv_shader_variant *variant);
-
 struct radv_meta_state {
 	VkAllocationCallbacks alloc;
 
@@ -950,15 +947,7 @@ struct radv_event {
 	uint64_t *map;
 };
 
-struct nir_shader;
-
-struct radv_shader_module {
-	struct nir_shader *                          nir;
-	unsigned char                                sha1[20];
-	uint32_t                                     size;
-	char                                         data[0];
-};
-
+struct radv_shader_module;
 struct ac_shader_variant_key;
 
 void
@@ -990,35 +979,6 @@ mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
 	     stage = __builtin_ffs(__tmp) - 1, __tmp;			\
 	     __tmp &= ~(1 << (stage)))
 
-
-struct radv_shader_slab {
-	struct list_head slabs;
-	struct list_head shaders;
-	struct radeon_winsys_bo *bo;
-	uint64_t size;
-	char *ptr;
-};
-
-struct radv_shader_variant {
-	uint32_t ref_count;
-
-	struct radeon_winsys_bo *bo;
-	uint64_t bo_offset;
-	struct ac_shader_config config;
-	uint32_t code_size;
-	struct ac_shader_variant_info info;
-	unsigned rsrc1;
-	unsigned rsrc2;
-
-	struct list_head slab_list;
-};
-
-
-void *radv_alloc_shader_memory(struct radv_device *device,
-                              struct radv_shader_variant *shader);
-
-void radv_destroy_shader_slabs(struct radv_device *device);
-
 struct radv_depth_stencil_state {
 	uint32_t db_depth_control;
 	uint32_t db_stencil_control;
@@ -1142,7 +1102,6 @@ static inline bool radv_pipeline_has_tess(struct radv_pipeline *pipeline)
 	return pipeline->shaders[MESA_SHADER_TESS_EVAL] ? true : false;
 }
 
-uint32_t radv_shader_stage_to_user_data_0(gl_shader_stage stage, bool has_gs, bool has_tess);
 struct ac_userdata_info *radv_lookup_user_sgpr(struct radv_pipeline *pipeline,
 					       gl_shader_stage stage,
 					       int idx);