diff options
| author | Samuel Pitoiset <[email protected]> | 2020-04-23 12:36:21 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2020-04-23 15:54:32 +0200 |
| commit | ff3f775476a907cd9410572d11e38b6c29e5e062 (patch) | |
| tree | ee4a0a2a21138fc13e5f7e2fa3cba9fb492fd144 /src/amd/vulkan/radv_pipeline.c | |
| parent | 0d9fe0405f5520716703d61544c6d899f051aa8b (diff) | |
radv: simplify checking for Navi1x chips
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4702>
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 448cbebf2ad..984a095aad8 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -4082,9 +4082,7 @@ radv_pipeline_generate_hw_ngg(struct radeon_cmdbuf *ctx_cs, * * Requirement: GE_CNTL.VERT_GRP_SIZE = VGT_GS_ONCHIP_CNTL.ES_VERTS_PER_SUBGRP - 5 */ - if ((pipeline->device->physical_device->rad_info.family == CHIP_NAVI10 || - pipeline->device->physical_device->rad_info.family == CHIP_NAVI12 || - pipeline->device->physical_device->rad_info.family == CHIP_NAVI14) && + if (pipeline->device->physical_device->rad_info.chip_class == GFX10 && !radv_pipeline_has_tess(pipeline) && ngg_state->hw_max_esverts != 256) { ge_cntl &= C_03096C_VERT_GRP_SIZE; |