diff options
| author | Dave Airlie <[email protected]> | 2018-02-19 07:31:55 +0000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2018-03-16 05:22:58 +0000 |
| commit | 6db44d6a8c35e414c393246d0d657dbcac3b981b (patch) | |
| tree | 89cc671a4ab89bd25abfcd54c7e07300ab3444de /src/amd/vulkan/radv_pipeline.c | |
| parent | 010d055aae7611f0a53b8b3dd3df98a71e52ad6a (diff) | |
radv: pass num_patches to tes from tcs
TES needs num_patches to do some of the calculations.
Reviewed-by: Samuel Pitoiset <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 641dc5558b8..cc7824566e0 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1785,6 +1785,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, &code_sizes[MESA_SHADER_TESS_CTRL]); } modules[MESA_SHADER_VERTEX] = NULL; + keys[MESA_SHADER_TESS_EVAL].tes.num_patches = pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches; } if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_GEOMETRY]) { @@ -1804,6 +1805,9 @@ void radv_create_shaders(struct radv_pipeline *pipeline, if (i == MESA_SHADER_TESS_CTRL) { keys[MESA_SHADER_TESS_CTRL].tcs.num_inputs = util_last_bit64(pipeline->shaders[MESA_SHADER_VERTEX]->info.info.vs.ls_outputs_written); } + if (i == MESA_SHADER_TESS_EVAL) { + keys[MESA_SHADER_TESS_EVAL].tes.num_patches = pipeline->shaders[MESA_SHADER_TESS_CTRL]->info.tcs.num_patches; + } pipeline->shaders[i] = radv_shader_variant_create(device, modules[i], &nir[i], 1, pipeline->layout, keys + i, &codes[i], |