diff options
| author | Samuel Pitoiset <[email protected]> | 2017-10-06 09:53:21 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-10-09 10:06:19 +0200 |
| commit | 7824cb4b03d972dc12d2ec249fad8fee6a2e137e (patch) | |
| tree | 01e47f78e8856c10c647d39932b0a56cf3b0ae5e /src/amd/vulkan/radv_pipeline.c | |
| parent | b09b43b166b1e532bdfb4960a33f9f82e7070029 (diff) | |
radv: configure VGT_VERTEX_REUSE at pipeline creation
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index c3458fa0372..7266fe02d67 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2087,6 +2087,13 @@ radv_pipeline_init(struct radv_pipeline *pipeline, else pipeline->graphics.vtx_emit_num = 2; } + + pipeline->graphics.vtx_reuse_depth = 30; + if (radv_pipeline_has_tess(pipeline) && + pipeline->shaders[MESA_SHADER_TESS_EVAL]->info.tes.spacing == TESS_SPACING_FRACTIONAL_ODD) { + pipeline->graphics.vtx_reuse_depth = 14; + } + if (device->debug_flags & RADV_DEBUG_DUMP_SHADER_STATS) { radv_dump_pipeline_stats(device, pipeline); } |