diff options
| author | Dave Airlie <[email protected]> | 2017-06-06 09:06:21 +1000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2017-06-06 09:44:10 +1000 |
| commit | 348f63623be4ad952d7a2541bc1f379ba3c355bd (patch) | |
| tree | cd6f310d07500a47d8f9ff6c5df6e5bfd7e524ba /src/amd/vulkan/radv_pipeline.c | |
| parent | 289de9f9450bf9fd8c5799a8e43cf220d339e3f0 (diff) | |
radv: misc GFX9 changes.
These are just some register changes ported from radeonsi for gfx9.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_pipeline.c')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 1f5fe50f62e..6671acd6633 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1332,11 +1332,12 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline, S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(1) | EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | EG_S_028A4C_FORCE_EOV_REZ_ENABLE(1); + ms->pa_sc_mode_cntl_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX9); if (ms->num_samples > 1) { unsigned log_samples = util_logbase2(ms->num_samples); unsigned log_ps_iter_samples = util_logbase2(util_next_power_of_two(ps_iter_samples)); - ms->pa_sc_mode_cntl_0 = S_028A48_MSAA_ENABLE(1); + ms->pa_sc_mode_cntl_0 |= S_028A48_MSAA_ENABLE(1); ms->pa_sc_line_cntl |= S_028BDC_EXPAND_LINE_WIDTH(1); /* CM_R_028BDC_PA_SC_LINE_CNTL */ ms->db_eqaa |= S_028804_MAX_ANCHOR_SAMPLES(log_samples) | S_028804_PS_ITER_SAMPLES(log_ps_iter_samples) | |