diff options
| author | Samuel Pitoiset <[email protected]> | 2020-01-06 08:27:49 +0100 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2020-01-09 07:58:33 +0100 |
| commit | 1b808d208f7ae6b7934ada37378c654991a5ca5a (patch) | |
| tree | 033069ef6ba151e411a279e18550cc3bbdc28d56 /src/amd/vulkan/radv_meta_resolve_cs.c | |
| parent | 37bfd854c71be8ace37080fbca36d0a1ef68fb8a (diff) | |
spirv,nir: add new lod parameter to image_{load,store} intrinsics
SPV_AMD_shader_image_load_store_lod allows to use a lod parameter
with OpImageRead, OpImageWrite and OpImageSparseRead.
According to the specification, this parameter should be a 32-bit
integer. It is initialized to 0 when no lod parameter is found
during SPIR-V->NIR translation.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_resolve_cs.c')
| -rw-r--r-- | src/amd/vulkan/radv_meta_resolve_cs.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index d1d69cbd8ae..f1b38d3ffc8 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -135,6 +135,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s store->src[1] = nir_src_for_ssa(coord); store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[3] = nir_src_for_ssa(outval); + store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); nir_builder_instr_insert(&b, &store->instr); return b.shader; } @@ -295,6 +296,7 @@ build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples, store->src[1] = nir_src_for_ssa(coord); store->src[2] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[3] = nir_src_for_ssa(outval); + store->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); nir_builder_instr_insert(&b, &store->instr); return b.shader; } |