diff options
author | Dave Airlie <[email protected]> | 2017-03-02 21:39:10 +0000 |
---|---|---|
committer | Dave Airlie <[email protected]> | 2017-07-17 01:44:43 +0100 |
commit | 9ee67467c9ea592340aee10a55ba54d7266ff0a9 (patch) | |
tree | 4588211428eb7a5f369bd0ac3629f32d34863d8a /src/amd/vulkan/radv_meta_fast_clear.c | |
parent | 8eed291c2c4bfaddf256dcdb10bfa95bfe2b7c58 (diff) |
radv: predicate cmask eliminate when using DCC.
When using DCC some clear values don't require a cmask eliminate
step. This patch adds support for black and black with alpha 1,
there are other values, but I don't have access to a comprehensive list.
This works by setting the cmask eliminate predicate when doing the
fast clear, and later when doing the cmask elimination making sure
the draws are predicated.
This increases the fps on Sascha Willems deferred.
Tonga: 580fps->670fps on a Tonga PRO card.
Polaris 730->850fps
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_fast_clear.c')
-rw-r--r-- | src/amd/vulkan/radv_meta_fast_clear.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index 94610c46987..27f8c160c06 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -334,6 +334,20 @@ emit_fast_clear_flush(struct radv_cmd_buffer *cmd_buffer, RADV_CMD_FLAG_FLUSH_AND_INV_CB_META); } +static void +radv_emit_set_predication_state_from_image(struct radv_cmd_buffer *cmd_buffer, + struct radv_image *image, bool value) +{ + uint64_t va = 0; + + if (value) { + va = cmd_buffer->device->ws->buffer_get_va(image->bo) + image->offset; + va += image->dcc_pred_offset; + } + + si_emit_set_predication_state(cmd_buffer, va); +} + /** */ void @@ -351,6 +365,10 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer, radv_meta_save_pass(&saved_pass_state, cmd_buffer); radv_meta_save_graphics_reset_vport_scissor_novertex(&saved_state, cmd_buffer); + if (image->surface.dcc_size) { + radv_emit_set_predication_state_from_image(cmd_buffer, image, true); + cmd_buffer->state.predicating = true; + } for (uint32_t layer = 0; layer < layer_count; ++layer) { struct radv_image_view iview; @@ -413,6 +431,10 @@ radv_fast_clear_flush_image_inplace(struct radv_cmd_buffer *cmd_buffer, &cmd_buffer->pool->alloc); } + if (image->surface.dcc_size) { + cmd_buffer->state.predicating = false; + radv_emit_set_predication_state_from_image(cmd_buffer, image, false); + } radv_meta_restore(&saved_state, cmd_buffer); radv_meta_restore_pass(&saved_pass_state, cmd_buffer); } |