diff options
author | Samuel Pitoiset <[email protected]> | 2018-04-06 16:17:26 +0200 |
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committer | Samuel Pitoiset <[email protected]> | 2018-04-09 11:21:26 +0200 |
commit | b0f8ad189c9b2f147d87477548b1f5547fdd6630 (patch) | |
tree | 9354b5fc0d5eaba0f7bb8c39f4b38133950d578b /src/amd/vulkan/radv_meta_clear.c | |
parent | 95d5ad80e9d9670a7dd8c6fd7891b97fd006b44d (diff) |
radv: add radv_image_is_tc_compat_htile() helper
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_clear.c')
-rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index f78b956fa12..016c1ee296e 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -553,7 +553,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer, clear_rect->rect.extent.width != iview->extent.width || clear_rect->rect.extent.height != iview->extent.height) return false; - if (iview->image->tc_compatible_htile && + if (radv_image_is_tc_compat_htile(iview->image) && (((aspects & VK_IMAGE_ASPECT_DEPTH_BIT) && clear_value.depth != 0.0 && clear_value.depth != 1.0) || ((aspects & VK_IMAGE_ASPECT_STENCIL_BIT) && clear_value.stencil != 0))) |