diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2018-06-19 10:05:20 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2018-06-19 22:35:13 +0200 |
| commit | ef79457004e141606614f6d582f7e51bd4cadc82 (patch) | |
| tree | 79c681c10ae4f48e71f441e248fa5d4abec99f99 /src/amd/vulkan/radv_meta_clear.c | |
| parent | ed06b1cdcadf2f09caefe33b67a67875e6181b4c (diff) | |
radv: Merge the flush bits of CMASK & DCC clear.
Probably won't be much different in practice, but still wrong.
Fixes Coverity issue 1435002.
Not CC'ing to stable since this is only hit if you enable MSAA
DCC via RADV_DEBUG.
Reviewed-by: Samuel Pitoiset <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_clear.c')
| -rw-r--r-- | src/amd/vulkan/radv_meta_clear.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c index 21c950c7823..14af2560821 100644 --- a/src/amd/vulkan/radv_meta_clear.c +++ b/src/amd/vulkan/radv_meta_clear.c @@ -1089,7 +1089,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer, if (!can_avoid_fast_clear_elim) need_decompress_pass = true; - flush_bits = radv_clear_dcc(cmd_buffer, iview->image, reset_value); + flush_bits |= radv_clear_dcc(cmd_buffer, iview->image, reset_value); radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image, need_decompress_pass); |