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authorSamuel Pitoiset <[email protected]>2018-04-06 15:37:28 +0200
committerSamuel Pitoiset <[email protected]>2018-04-09 11:21:10 +0200
commit0fc9113ac593e396d3b103bebb2713aac9d072ff (patch)
tree21c03ba72739d46d99c46375975e71cd7ee07260 /src/amd/vulkan/radv_meta_clear.c
parent32f5174ce825d13ed3b1cb6e8c5f8091ddc5045f (diff)
radv: add radv_image_has_{cmask,fmask,dcc,htile}() helpers
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_clear.c')
-rw-r--r--src/amd/vulkan/radv_meta_clear.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 7de2f2d0133..f78b956fa12 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -558,7 +558,7 @@ static bool depth_view_can_fast_clear(struct radv_cmd_buffer *cmd_buffer,
clear_value.depth != 1.0) ||
((aspects & VK_IMAGE_ASPECT_STENCIL_BIT) && clear_value.stencil != 0)))
return false;
- if (iview->image->surface.htile_size &&
+ if (radv_image_has_htile(iview->image) &&
iview->base_mip == 0 &&
iview->base_layer == 0 &&
radv_layout_is_htile_compressed(iview->image, layout, queue_mask) &&
@@ -682,7 +682,7 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
VkImageAspectFlags aspects = clear_att->aspectMask;
uint32_t clear_word, flush_bits;
- if (!iview->image->surface.htile_size)
+ if (!radv_image_has_htile(iview->image))
return false;
if (cmd_buffer->device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
@@ -867,7 +867,7 @@ radv_get_cmask_fast_clear_value(const struct radv_image *image)
/* The fast-clear value is different for images that have both DCC and
* CMASK metadata.
*/
- if (image->surface.dcc_size) {
+ if (radv_image_has_dcc(image)) {
/* DCC fast clear with MSAA should clear CMASK to 0xC. */
return image->info.samples > 1 ? 0xcccccccc : 0xffffffff;
}
@@ -989,7 +989,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
uint32_t cmask_clear_value;
bool ret;
- if (!iview->image->cmask.size && !iview->image->surface.dcc_size)
+ if (!radv_image_has_cmask(iview->image) && !radv_image_has_dcc(iview->image))
return false;
if (cmd_buffer->device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
@@ -1030,7 +1030,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
goto fail;
/* RB+ doesn't work with CMASK fast clear on Stoney. */
- if (!iview->image->surface.dcc_size &&
+ if (!radv_image_has_dcc(iview->image) &&
cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY)
goto fail;
@@ -1051,7 +1051,7 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
cmask_clear_value = radv_get_cmask_fast_clear_value(iview->image);
/* clear cmask buffer */
- if (iview->image->surface.dcc_size) {
+ if (radv_image_has_dcc(iview->image)) {
uint32_t reset_value;
bool can_avoid_fast_clear_elim;
vi_get_fast_clear_parameters(iview->image->vk_format,