diff options
| author | Samuel Pitoiset <[email protected]> | 2017-10-26 18:03:23 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2017-10-27 13:47:03 +0200 |
| commit | 0d61109bb75333b3e80fda69cbc5b75b0f3f9233 (patch) | |
| tree | 3c39d9a62be039f3e8d800f02b51aa26fc050a67 /src/amd/vulkan/radv_meta_buffer.c | |
| parent | 4b9421d45da41955947f4c75be033ec1bc1d18f5 (diff) | |
radv: make radv_fill_buffer() return the needed flush bits
Only needed when the CS path is used.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_buffer.c')
| -rw-r--r-- | src/amd/vulkan/radv_meta_buffer.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_meta_buffer.c b/src/amd/vulkan/radv_meta_buffer.c index a737dbeec39..f7ffcbbc90b 100644 --- a/src/amd/vulkan/radv_meta_buffer.c +++ b/src/amd/vulkan/radv_meta_buffer.c @@ -404,21 +404,28 @@ static void copy_buffer_shader(struct radv_cmd_buffer *cmd_buffer, } -void radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, +uint32_t radv_fill_buffer(struct radv_cmd_buffer *cmd_buffer, struct radeon_winsys_bo *bo, uint64_t offset, uint64_t size, uint32_t value) { + uint32_t flush_bits = 0; + assert(!(offset & 3)); assert(!(size & 3)); - if (size >= RADV_BUFFER_OPS_CS_THRESHOLD) + if (size >= RADV_BUFFER_OPS_CS_THRESHOLD) { fill_buffer_shader(cmd_buffer, bo, offset, size, value); - else if (size) { + flush_bits = RADV_CMD_FLAG_CS_PARTIAL_FLUSH | + RADV_CMD_FLAG_INV_VMEM_L1 | + RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2; + } else if (size) { uint64_t va = radv_buffer_get_va(bo); va += offset; cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, bo, 8); si_cp_dma_clear_buffer(cmd_buffer, va, size, value); } + + return flush_bits; } static |