diff options
| author | Samuel Pitoiset <[email protected]> | 2019-10-21 10:42:30 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-10-23 08:33:08 +0200 |
| commit | f4ab58c1a07c58525018649573ffff92eb3ccf19 (patch) | |
| tree | 92f0a261557affee1a7bc58b466c4452f780982a /src/amd/vulkan/radv_meta_blit2d.c | |
| parent | 2b5f30b1d91b98ab27ba21439cd8a40a0d1ece36 (diff) | |
radv: do not create meta pipelines with 16 samples
The driver only supports up to 8 samples, so it's useless to
create more pipelines than needed.
This fixes a conditional jump reported by Valgrind on GFX10:
==194282== Conditional jump or move depends on uninitialised value(s)
==194282== at 0xDBF925A: radv_gfx10_compute_bin_size (radv_pipeline.c:3242)
==194282== by 0xDBF95A6: radv_pipeline_generate_binning_state (radv_pipeline.c:3334)
==194282== by 0xDBFC1A0: radv_pipeline_generate_pm4 (radv_pipeline.c:4440)
==194282== by 0xDBFD15E: radv_pipeline_init (radv_pipeline.c:4764)
==194282== by 0xDBFD23E: radv_graphics_pipeline_create (radv_pipeline.c:4788)
==194282== by 0xDBB95A3: create_pipeline (radv_meta_clear.c:114)
==194282== by 0xDBB9AC5: create_color_pipeline (radv_meta_clear.c:297)
==194282== by 0xDBBCF05: radv_device_init_meta_clear_state (radv_meta_clear.c:1277)
==194282== by 0xDB9ACD9: radv_device_init_meta (radv_meta.c:363)
==194282== by 0xDB7FE3A: radv_CreateDevice (radv_device.c:2080
This is caused by an out of bound access of 'fmask_array' (ie. index
is 4 as for 16 samples).
Cc: <[email protected]>
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/amd/vulkan/radv_meta_blit2d.c')
| -rw-r--r-- | src/amd/vulkan/radv_meta_blit2d.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_meta_blit2d.c b/src/amd/vulkan/radv_meta_blit2d.c index de3d5791611..e9aa951ff22 100644 --- a/src/amd/vulkan/radv_meta_blit2d.c +++ b/src/amd/vulkan/radv_meta_blit2d.c @@ -698,7 +698,7 @@ radv_device_finish_meta_blit2d_state(struct radv_device *device) state->blit2d_stencil_only_rp[j], &state->alloc); } - for (unsigned log2_samples = 0; log2_samples < 1 + MAX_SAMPLES_LOG2; ++log2_samples) { + for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; ++log2_samples) { for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { radv_DestroyPipelineLayout(radv_device_to_handle(device), state->blit2d[log2_samples].p_layouts[src], @@ -1310,7 +1310,7 @@ radv_device_init_meta_blit2d_state(struct radv_device *device, bool on_demand) VkResult result; bool create_3d = device->physical_device->rad_info.chip_class == GFX9; - for (unsigned log2_samples = 0; log2_samples < 1 + MAX_SAMPLES_LOG2; log2_samples++) { + for (unsigned log2_samples = 0; log2_samples < MAX_SAMPLES_LOG2; log2_samples++) { for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) { if (src == BLIT2D_SRC_TYPE_IMAGE_3D && !create_3d) continue; |